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Side by Side Diff: src/IceTargetLoweringMIPS32.cpp

Issue 2533563002: [SubZero] Fix size of arguments on stack (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years ago
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1 // 1 //
2 // The Subzero Code Generator 2 // The Subzero Code Generator
3 // 3 //
4 // This file is distributed under the University of Illinois Open Source 4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details. 5 // License. See LICENSE.TXT for details.
6 // 6 //
7 //===----------------------------------------------------------------------===// 7 //===----------------------------------------------------------------------===//
8 /// 8 ///
9 /// \file 9 /// \file
10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
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218 } 218 }
219 219
220 uint32_t TargetMIPS32::getStackAlignment() const { 220 uint32_t TargetMIPS32::getStackAlignment() const {
221 return MIPS32_STACK_ALIGNMENT_BYTES; 221 return MIPS32_STACK_ALIGNMENT_BYTES;
222 } 222 }
223 223
224 uint32_t TargetMIPS32::getCallStackArgumentsSizeBytes(const InstCall *Call) { 224 uint32_t TargetMIPS32::getCallStackArgumentsSizeBytes(const InstCall *Call) {
225 TargetMIPS32::CallingConv CC; 225 TargetMIPS32::CallingConv CC;
226 RegNumT DummyReg; 226 RegNumT DummyReg;
227 size_t OutArgsSizeBytes = 0; 227 size_t OutArgsSizeBytes = 0;
228 Variable *Dest = Call->getDest();
229 bool PartialOnStack = false;
230 if (Dest && isVectorFloatingType(Dest->getType())) {
Jim Stichnoth 2016/11/25 14:58:02 if (Dest != nullptr && ...)
jaydeep.patil 2016/11/28 03:08:36 Done.
231 CC.discardReg(RegMIPS32::Reg_A0);
232 // Next vector is partially on stack
233 PartialOnStack = true;
234 }
228 for (SizeT i = 0, NumArgs = Call->getNumArgs(); i < NumArgs; ++i) { 235 for (SizeT i = 0, NumArgs = Call->getNumArgs(); i < NumArgs; ++i) {
229 Operand *Arg = legalizeUndef(Call->getArg(i)); 236 Operand *Arg = legalizeUndef(Call->getArg(i));
230 const Type Ty = Arg->getType(); 237 const Type Ty = Arg->getType();
231 RegNumT RegNum; 238 RegNumT RegNum;
232 if (CC.argInReg(Ty, i, &RegNum)) { 239 if (CC.argInReg(Ty, i, &RegNum)) {
240 // If PartialOnStack is true and if this is a vector type
Jim Stichnoth 2016/11/25 14:58:02 Reflow comment to 80-col
jaydeep.patil 2016/11/28 03:08:36 Done.
241 // then last two elements are on stack
242 if (PartialOnStack == true && isVectorType(Ty)) {
Jim Stichnoth 2016/11/25 14:58:02 if (PartialOnStack && ...)
jaydeep.patil 2016/11/28 03:08:36 Done.
243 OutArgsSizeBytes = applyStackAlignmentTy(OutArgsSizeBytes, IceType_i32);
244 OutArgsSizeBytes += typeWidthInBytesOnStack(IceType_i32) * 2;
245 }
233 continue; 246 continue;
234 } 247 }
235
236 OutArgsSizeBytes = applyStackAlignmentTy(OutArgsSizeBytes, Ty); 248 OutArgsSizeBytes = applyStackAlignmentTy(OutArgsSizeBytes, Ty);
237 OutArgsSizeBytes += typeWidthInBytesOnStack(Ty); 249 OutArgsSizeBytes += typeWidthInBytesOnStack(Ty);
238 } 250 }
239 251 // Add size of argument save area
252 OutArgsSizeBytes += MIPS32_MAX_GPR_ARG * 4;
Jim Stichnoth 2016/11/25 14:58:02 Instead of "4", can you use something more symboli
jaydeep.patil 2016/11/28 03:08:36 Done.
240 return applyStackAlignment(OutArgsSizeBytes); 253 return applyStackAlignment(OutArgsSizeBytes);
241 } 254 }
242 255
243 namespace { 256 namespace {
244 inline uint64_t getConstantMemoryOrder(Operand *Opnd) { 257 inline uint64_t getConstantMemoryOrder(Operand *Opnd) {
245 if (auto *Integer = llvm::dyn_cast<ConstantInteger32>(Opnd)) 258 if (auto *Integer = llvm::dyn_cast<ConstantInteger32>(Opnd))
246 return Integer->getValue(); 259 return Integer->getValue();
247 return Intrinsics::MemoryOrderInvalid; 260 return Intrinsics::MemoryOrderInvalid;
248 } 261 }
249 } 262 }
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5962 if (auto *CallTargetR = llvm::dyn_cast<Variable>(CallTarget)) { 5975 if (auto *CallTargetR = llvm::dyn_cast<Variable>(CallTarget)) {
5963 Variable *T6 = Target->getPhysicalRegister(RegMIPS32::Reg_T6); 5976 Variable *T6 = Target->getPhysicalRegister(RegMIPS32::Reg_T6);
5964 Target->_and(CallTargetR, CallTargetR, T6); 5977 Target->_and(CallTargetR, CallTargetR, T6);
5965 } 5978 }
5966 } 5979 }
5967 return Target->Context.insert<InstMIPS32Call>(ReturnReg, CallTarget); 5980 return Target->Context.insert<InstMIPS32Call>(ReturnReg, CallTarget);
5968 } 5981 }
5969 5982
5970 } // end of namespace MIPS32 5983 } // end of namespace MIPS32
5971 } // end of namespace Ice 5984 } // end of namespace Ice
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