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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/machine-operator-reducer.h" | 5 #include "src/compiler/machine-operator-reducer.h" |
6 | 6 |
7 #include "src/base/bits.h" | 7 #include "src/base/bits.h" |
8 #include "src/base/division-by-constant.h" | 8 #include "src/base/division-by-constant.h" |
9 #include "src/base/ieee754.h" | 9 #include "src/base/ieee754.h" |
10 #include "src/codegen.h" | 10 #include "src/codegen.h" |
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43 return graph()->NewNode(common()->Int64Constant(value)); | 43 return graph()->NewNode(common()->Int64Constant(value)); |
44 } | 44 } |
45 | 45 |
46 Node* MachineOperatorReducer::Float64Mul(Node* lhs, Node* rhs) { | 46 Node* MachineOperatorReducer::Float64Mul(Node* lhs, Node* rhs) { |
47 return graph()->NewNode(machine()->Float64Mul(), lhs, rhs); | 47 return graph()->NewNode(machine()->Float64Mul(), lhs, rhs); |
48 } | 48 } |
49 | 49 |
50 Node* MachineOperatorReducer::Float64PowHalf(Node* value) { | 50 Node* MachineOperatorReducer::Float64PowHalf(Node* value) { |
51 value = | 51 value = |
52 graph()->NewNode(machine()->Float64Add(), Float64Constant(0.0), value); | 52 graph()->NewNode(machine()->Float64Add(), Float64Constant(0.0), value); |
53 return graph()->NewNode( | 53 Diamond d(graph(), common(), |
54 common()->Select(MachineRepresentation::kFloat64, BranchHint::kFalse), | 54 graph()->NewNode(machine()->Float64LessThanOrEqual(), value, |
55 graph()->NewNode(machine()->Float64LessThanOrEqual(), value, | 55 Float64Constant(-V8_INFINITY)), |
56 Float64Constant(-V8_INFINITY)), | 56 BranchHint::kFalse); |
57 Float64Constant(V8_INFINITY), | 57 return d.Phi(MachineRepresentation::kFloat64, Float64Constant(V8_INFINITY), |
58 graph()->NewNode(machine()->Float64Sqrt(), value)); | 58 graph()->NewNode(machine()->Float64Sqrt(), value)); |
59 } | 59 } |
60 | 60 |
61 Node* MachineOperatorReducer::Word32And(Node* lhs, Node* rhs) { | 61 Node* MachineOperatorReducer::Word32And(Node* lhs, Node* rhs) { |
62 Node* const node = graph()->NewNode(machine()->Word32And(), lhs, rhs); | 62 Node* const node = graph()->NewNode(machine()->Word32And(), lhs, rhs); |
63 Reduction const reduction = ReduceWord32And(node); | 63 Reduction const reduction = ReduceWord32And(node); |
64 return reduction.Changed() ? reduction.replacement() : node; | 64 return reduction.Changed() ? reduction.replacement() : node; |
65 } | 65 } |
66 | 66 |
67 | 67 |
68 Node* MachineOperatorReducer::Word32Sar(Node* lhs, uint32_t rhs) { | 68 Node* MachineOperatorReducer::Word32Sar(Node* lhs, uint32_t rhs) { |
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834 if (m.IsFoldable()) { // K % K => K | 834 if (m.IsFoldable()) { // K % K => K |
835 return ReplaceInt32( | 835 return ReplaceInt32( |
836 base::bits::SignedMod32(m.left().Value(), m.right().Value())); | 836 base::bits::SignedMod32(m.left().Value(), m.right().Value())); |
837 } | 837 } |
838 if (m.right().HasValue()) { | 838 if (m.right().HasValue()) { |
839 Node* const dividend = m.left().node(); | 839 Node* const dividend = m.left().node(); |
840 int32_t const divisor = Abs(m.right().Value()); | 840 int32_t const divisor = Abs(m.right().Value()); |
841 if (base::bits::IsPowerOfTwo32(divisor)) { | 841 if (base::bits::IsPowerOfTwo32(divisor)) { |
842 uint32_t const mask = divisor - 1; | 842 uint32_t const mask = divisor - 1; |
843 Node* const zero = Int32Constant(0); | 843 Node* const zero = Int32Constant(0); |
844 node->ReplaceInput( | 844 Diamond d(graph(), common(), |
845 0, graph()->NewNode(machine()->Int32LessThan(), dividend, zero)); | 845 graph()->NewNode(machine()->Int32LessThan(), dividend, zero), |
846 node->ReplaceInput( | 846 BranchHint::kFalse); |
847 1, Int32Sub(zero, Word32And(Int32Sub(zero, dividend), mask))); | 847 return Replace( |
848 node->ReplaceInput(2, Word32And(dividend, mask)); | 848 d.Phi(MachineRepresentation::kWord32, |
849 NodeProperties::ChangeOp( | 849 Int32Sub(zero, Word32And(Int32Sub(zero, dividend), mask)), |
850 node, | 850 Word32And(dividend, mask))); |
851 common()->Select(MachineRepresentation::kWord32, BranchHint::kFalse)); | |
852 } else { | 851 } else { |
853 Node* quotient = Int32Div(dividend, divisor); | 852 Node* quotient = Int32Div(dividend, divisor); |
854 DCHECK_EQ(dividend, node->InputAt(0)); | 853 DCHECK_EQ(dividend, node->InputAt(0)); |
855 node->ReplaceInput(1, Int32Mul(quotient, Int32Constant(divisor))); | 854 node->ReplaceInput(1, Int32Mul(quotient, Int32Constant(divisor))); |
856 node->TrimInputCount(2); | 855 node->TrimInputCount(2); |
857 NodeProperties::ChangeOp(node, machine()->Int32Sub()); | 856 NodeProperties::ChangeOp(node, machine()->Int32Sub()); |
858 } | 857 } |
859 return Changed(node); | 858 return Changed(node); |
860 } | 859 } |
861 return NoChange(); | 860 return NoChange(); |
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1401 MachineOperatorBuilder* MachineOperatorReducer::machine() const { | 1400 MachineOperatorBuilder* MachineOperatorReducer::machine() const { |
1402 return jsgraph()->machine(); | 1401 return jsgraph()->machine(); |
1403 } | 1402 } |
1404 | 1403 |
1405 | 1404 |
1406 Graph* MachineOperatorReducer::graph() const { return jsgraph()->graph(); } | 1405 Graph* MachineOperatorReducer::graph() const { return jsgraph()->graph(); } |
1407 | 1406 |
1408 } // namespace compiler | 1407 } // namespace compiler |
1409 } // namespace internal | 1408 } // namespace internal |
1410 } // namespace v8 | 1409 } // namespace v8 |
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