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Side by Side Diff: src/compiler/arm/code-generator-arm.cc

Issue 2523933002: [Turbofan] Add ARM support for simd128 moves and swaps. (Closed)
Patch Set: Rebase. Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm/macro-assembler-arm.h" 7 #include "src/arm/macro-assembler-arm.h"
8 #include "src/compilation-info.h" 8 #include "src/compilation-info.h"
9 #include "src/compiler/code-generator-impl.h" 9 #include "src/compiler/code-generator-impl.h"
10 #include "src/compiler/gap-resolver.h" 10 #include "src/compiler/gap-resolver.h"
(...skipping 1873 matching lines...) Expand 10 before | Expand all | Expand 10 after
1884 MachineRepresentation rep = LocationOperand::cast(source)->representation(); 1884 MachineRepresentation rep = LocationOperand::cast(source)->representation();
1885 if (rep == MachineRepresentation::kFloat64) { 1885 if (rep == MachineRepresentation::kFloat64) {
1886 DwVfpRegister src = g.ToDoubleRegister(source); 1886 DwVfpRegister src = g.ToDoubleRegister(source);
1887 if (destination->IsDoubleRegister()) { 1887 if (destination->IsDoubleRegister()) {
1888 DwVfpRegister dst = g.ToDoubleRegister(destination); 1888 DwVfpRegister dst = g.ToDoubleRegister(destination);
1889 __ Move(dst, src); 1889 __ Move(dst, src);
1890 } else { 1890 } else {
1891 DCHECK(destination->IsDoubleStackSlot()); 1891 DCHECK(destination->IsDoubleStackSlot());
1892 __ vstr(src, g.ToMemOperand(destination)); 1892 __ vstr(src, g.ToMemOperand(destination));
1893 } 1893 }
1894 } else { 1894 } else if (rep == MachineRepresentation::kFloat32) {
1895 DCHECK_EQ(MachineRepresentation::kFloat32, rep);
1896 // GapResolver may give us reg codes that don't map to actual s-registers. 1895 // GapResolver may give us reg codes that don't map to actual s-registers.
1897 // Generate code to work around those cases. 1896 // Generate code to work around those cases.
1898 int src_code = LocationOperand::cast(source)->register_code(); 1897 int src_code = LocationOperand::cast(source)->register_code();
1899 if (destination->IsFloatRegister()) { 1898 if (destination->IsFloatRegister()) {
1900 int dst_code = LocationOperand::cast(destination)->register_code(); 1899 int dst_code = LocationOperand::cast(destination)->register_code();
1901 __ VmovExtended(dst_code, src_code, kScratchReg); 1900 __ VmovExtended(dst_code, src_code, kScratchReg);
1902 } else { 1901 } else {
1903 DCHECK(destination->IsFloatStackSlot()); 1902 DCHECK(destination->IsFloatStackSlot());
1904 __ VmovExtended(g.ToMemOperand(destination), src_code, kScratchReg); 1903 __ VmovExtended(g.ToMemOperand(destination), src_code, kScratchReg);
1905 } 1904 }
1905 } else {
1906 DCHECK_EQ(MachineRepresentation::kSimd128, rep);
1907 QwNeonRegister src = g.ToSimd128Register(source);
1908 if (destination->IsSimd128Register()) {
1909 QwNeonRegister dst = g.ToSimd128Register(destination);
1910 __ Move(dst, src);
1911 } else {
1912 DCHECK(destination->IsSimd128StackSlot());
1913 MemOperand dst = g.ToMemOperand(destination);
1914 __ add(kScratchReg, dst.rn(), Operand(dst.offset()));
1915 __ vst1(Neon8, NeonListOperand(src.low(), 2),
1916 NeonMemOperand(kScratchReg));
1917 }
1906 } 1918 }
1907 } else if (source->IsFPStackSlot()) { 1919 } else if (source->IsFPStackSlot()) {
1908 MemOperand src = g.ToMemOperand(source); 1920 MemOperand src = g.ToMemOperand(source);
1909 MachineRepresentation rep = 1921 MachineRepresentation rep =
1910 LocationOperand::cast(destination)->representation(); 1922 LocationOperand::cast(destination)->representation();
1911 if (destination->IsFPRegister()) { 1923 if (destination->IsFPRegister()) {
1912 if (rep == MachineRepresentation::kFloat64) { 1924 if (rep == MachineRepresentation::kFloat64) {
1913 __ vldr(g.ToDoubleRegister(destination), src); 1925 __ vldr(g.ToDoubleRegister(destination), src);
1914 } else { 1926 } else if (rep == MachineRepresentation::kFloat32) {
1915 DCHECK_EQ(MachineRepresentation::kFloat32, rep);
1916 // GapResolver may give us reg codes that don't map to actual 1927 // GapResolver may give us reg codes that don't map to actual
1917 // s-registers. Generate code to work around those cases. 1928 // s-registers. Generate code to work around those cases.
1918 int dst_code = LocationOperand::cast(destination)->register_code(); 1929 int dst_code = LocationOperand::cast(destination)->register_code();
1919 __ VmovExtended(dst_code, src, kScratchReg); 1930 __ VmovExtended(dst_code, src, kScratchReg);
1931 } else {
1932 DCHECK_EQ(MachineRepresentation::kSimd128, rep);
1933 QwNeonRegister dst = g.ToSimd128Register(destination);
1934 __ add(kScratchReg, src.rn(), Operand(src.offset()));
1935 __ vld1(Neon8, NeonListOperand(dst.low(), 2),
1936 NeonMemOperand(kScratchReg));
1920 } 1937 }
1921 } else { 1938 } else if (rep == MachineRepresentation::kFloat64) {
1922 DCHECK(destination->IsFPStackSlot()); 1939 DCHECK(destination->IsFPStackSlot());
1923 if (rep == MachineRepresentation::kFloat64) { 1940 if (rep == MachineRepresentation::kFloat64) {
1924 DwVfpRegister temp = kScratchDoubleReg; 1941 DwVfpRegister temp = kScratchDoubleReg;
1925 __ vldr(temp, src); 1942 __ vldr(temp, src);
1926 __ vstr(temp, g.ToMemOperand(destination)); 1943 __ vstr(temp, g.ToMemOperand(destination));
1927 } else { 1944 } else if (rep == MachineRepresentation::kFloat32) {
1928 DCHECK_EQ(MachineRepresentation::kFloat32, rep);
1929 SwVfpRegister temp = kScratchDoubleReg.low(); 1945 SwVfpRegister temp = kScratchDoubleReg.low();
1930 __ vldr(temp, src); 1946 __ vldr(temp, src);
1931 __ vstr(temp, g.ToMemOperand(destination)); 1947 __ vstr(temp, g.ToMemOperand(destination));
1948 } else {
1949 DCHECK_EQ(MachineRepresentation::kSimd128, rep);
1950 MemOperand dst = g.ToMemOperand(destination);
1951 __ add(kScratchReg, src.rn(), Operand(src.offset()));
1952 __ vld1(Neon8, NeonListOperand(kScratchQuadReg.low(), 2),
1953 NeonMemOperand(kScratchReg));
1954 __ add(kScratchReg, dst.rn(), Operand(dst.offset()));
1955 __ vst1(Neon8, NeonListOperand(kScratchQuadReg.low(), 2),
1956 NeonMemOperand(kScratchReg));
1957 __ veor(kDoubleRegZero, kDoubleRegZero, kDoubleRegZero);
1932 } 1958 }
1933 } 1959 }
1934 } else { 1960 } else {
1935 UNREACHABLE(); 1961 UNREACHABLE();
1936 } 1962 }
1937 } 1963 }
1938 1964
1939
1940 void CodeGenerator::AssembleSwap(InstructionOperand* source, 1965 void CodeGenerator::AssembleSwap(InstructionOperand* source,
1941 InstructionOperand* destination) { 1966 InstructionOperand* destination) {
1942 ArmOperandConverter g(this, nullptr); 1967 ArmOperandConverter g(this, nullptr);
1943 // Dispatch on the source and destination operand kinds. Not all 1968 // Dispatch on the source and destination operand kinds. Not all
1944 // combinations are possible. 1969 // combinations are possible.
1945 if (source->IsRegister()) { 1970 if (source->IsRegister()) {
1946 // Register-register. 1971 // Register-register.
1947 Register temp = kScratchReg; 1972 Register temp = kScratchReg;
1948 Register src = g.ToRegister(source); 1973 Register src = g.ToRegister(source);
1949 if (destination->IsRegister()) { 1974 if (destination->IsRegister()) {
(...skipping 18 matching lines...) Expand all
1968 __ vldr(temp_1, dst); 1993 __ vldr(temp_1, dst);
1969 __ str(temp_0, dst); 1994 __ str(temp_0, dst);
1970 __ vstr(temp_1, src); 1995 __ vstr(temp_1, src);
1971 } else if (source->IsFPRegister()) { 1996 } else if (source->IsFPRegister()) {
1972 MachineRepresentation rep = LocationOperand::cast(source)->representation(); 1997 MachineRepresentation rep = LocationOperand::cast(source)->representation();
1973 LowDwVfpRegister temp = kScratchDoubleReg; 1998 LowDwVfpRegister temp = kScratchDoubleReg;
1974 if (rep == MachineRepresentation::kFloat64) { 1999 if (rep == MachineRepresentation::kFloat64) {
1975 DwVfpRegister src = g.ToDoubleRegister(source); 2000 DwVfpRegister src = g.ToDoubleRegister(source);
1976 if (destination->IsFPRegister()) { 2001 if (destination->IsFPRegister()) {
1977 DwVfpRegister dst = g.ToDoubleRegister(destination); 2002 DwVfpRegister dst = g.ToDoubleRegister(destination);
1978 __ vswp(src, dst); 2003 __ Swap(src, dst);
1979 } else { 2004 } else {
1980 DCHECK(destination->IsFPStackSlot()); 2005 DCHECK(destination->IsFPStackSlot());
1981 MemOperand dst = g.ToMemOperand(destination); 2006 MemOperand dst = g.ToMemOperand(destination);
1982 __ Move(temp, src); 2007 __ Move(temp, src);
1983 __ vldr(src, dst); 2008 __ vldr(src, dst);
1984 __ vstr(temp, dst); 2009 __ vstr(temp, dst);
1985 } 2010 }
1986 } else { 2011 } else if (rep == MachineRepresentation::kFloat32) {
1987 DCHECK_EQ(MachineRepresentation::kFloat32, rep);
1988 int src_code = LocationOperand::cast(source)->register_code(); 2012 int src_code = LocationOperand::cast(source)->register_code();
1989 if (destination->IsFPRegister()) { 2013 if (destination->IsFPRegister()) {
1990 int dst_code = LocationOperand::cast(destination)->register_code(); 2014 int dst_code = LocationOperand::cast(destination)->register_code();
1991 __ VmovExtended(temp.low().code(), src_code, kScratchReg); 2015 __ VmovExtended(temp.low().code(), src_code, kScratchReg);
1992 __ VmovExtended(src_code, dst_code, kScratchReg); 2016 __ VmovExtended(src_code, dst_code, kScratchReg);
1993 __ VmovExtended(dst_code, temp.low().code(), kScratchReg); 2017 __ VmovExtended(dst_code, temp.low().code(), kScratchReg);
1994 } else { 2018 } else {
1995 DCHECK(destination->IsFPStackSlot()); 2019 DCHECK(destination->IsFPStackSlot());
1996 MemOperand dst = g.ToMemOperand(destination); 2020 MemOperand dst = g.ToMemOperand(destination);
1997 __ VmovExtended(temp.low().code(), src_code, kScratchReg); 2021 __ VmovExtended(temp.low().code(), src_code, kScratchReg);
1998 __ VmovExtended(src_code, dst, kScratchReg); 2022 __ VmovExtended(src_code, dst, kScratchReg);
1999 __ vstr(temp.low(), dst); 2023 __ vstr(temp.low(), dst);
2000 } 2024 }
2025 } else {
2026 DCHECK_EQ(MachineRepresentation::kSimd128, rep);
2027 QwNeonRegister src = g.ToSimd128Register(source);
2028 if (destination->IsFPRegister()) {
2029 QwNeonRegister dst = g.ToSimd128Register(destination);
2030 __ Swap(src, dst);
2031 } else {
2032 DCHECK(destination->IsFPStackSlot());
2033 MemOperand dst = g.ToMemOperand(destination);
2034 __ Move(kScratchQuadReg, src);
2035 __ add(kScratchReg, dst.rn(), Operand(dst.offset()));
2036 __ vld1(Neon8, NeonListOperand(src.low(), 2),
2037 NeonMemOperand(kScratchReg));
2038 __ vst1(Neon8, NeonListOperand(kScratchQuadReg.low(), 2),
2039 NeonMemOperand(kScratchReg));
2040 __ veor(kDoubleRegZero, kDoubleRegZero, kDoubleRegZero);
2041 }
2001 } 2042 }
2002 } else if (source->IsFPStackSlot()) { 2043 } else if (source->IsFPStackSlot()) {
2003 DCHECK(destination->IsFPStackSlot()); 2044 DCHECK(destination->IsFPStackSlot());
2004 Register temp_0 = kScratchReg; 2045 MemOperand src = g.ToMemOperand(source);
2005 LowDwVfpRegister temp_1 = kScratchDoubleReg; 2046 MemOperand dst = g.ToMemOperand(destination);
2006 MemOperand src0 = g.ToMemOperand(source);
2007 MemOperand dst0 = g.ToMemOperand(destination);
2008 MachineRepresentation rep = LocationOperand::cast(source)->representation(); 2047 MachineRepresentation rep = LocationOperand::cast(source)->representation();
2009 if (rep == MachineRepresentation::kFloat64) { 2048 if (rep == MachineRepresentation::kFloat64) {
2010 MemOperand src1(src0.rn(), src0.offset() + kPointerSize); 2049 __ vldr(kScratchDoubleReg, dst);
2011 MemOperand dst1(dst0.rn(), dst0.offset() + kPointerSize); 2050 __ vldr(kDoubleRegZero, src);
2012 __ vldr(temp_1, dst0); // Save destination in temp_1. 2051 __ vstr(kScratchDoubleReg, src);
2013 __ ldr(temp_0, src0); // Then use temp_0 to copy source to destination. 2052 __ vstr(kDoubleRegZero, dst);
2014 __ str(temp_0, dst0); 2053 // Restore the 0 register.
2015 __ ldr(temp_0, src1); 2054 __ veor(kDoubleRegZero, kDoubleRegZero, kDoubleRegZero);
2016 __ str(temp_0, dst1); 2055 } else if (rep == MachineRepresentation::kFloat32) {
2017 __ vstr(temp_1, src0); 2056 __ vldr(kScratchDoubleReg.low(), dst);
2057 __ vldr(kScratchDoubleReg.high(), src);
2058 __ vstr(kScratchDoubleReg.low(), src);
2059 __ vstr(kScratchDoubleReg.high(), dst);
2018 } else { 2060 } else {
2019 DCHECK_EQ(MachineRepresentation::kFloat32, rep); 2061 DCHECK_EQ(MachineRepresentation::kSimd128, rep);
2020 __ vldr(temp_1.low(), dst0); // Save destination in temp_1. 2062 __ vldr(kScratchDoubleReg, dst);
2021 __ ldr(temp_0, src0); // Then use temp_0 to copy source to destination. 2063 __ vldr(kDoubleRegZero, src);
2022 __ str(temp_0, dst0); 2064 __ vstr(kScratchDoubleReg, src);
2023 __ vstr(temp_1.low(), src0); 2065 __ vstr(kDoubleRegZero, dst);
2066 src.set_offset(src.offset() + kDoubleSize);
2067 dst.set_offset(dst.offset() + kDoubleSize);
2068 __ vldr(kScratchDoubleReg, dst);
2069 __ vldr(kDoubleRegZero, src);
2070 __ vstr(kScratchDoubleReg, src);
2071 __ vstr(kDoubleRegZero, dst);
2072 // Restore the 0 register.
2073 __ veor(kDoubleRegZero, kDoubleRegZero, kDoubleRegZero);
2024 } 2074 }
2025 } else { 2075 } else {
2026 // No other combinations are possible. 2076 // No other combinations are possible.
2027 UNREACHABLE(); 2077 UNREACHABLE();
2028 } 2078 }
2029 } 2079 }
2030 2080
2031 void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) { 2081 void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
2032 // On 32-bit ARM we emit the jump tables inline. 2082 // On 32-bit ARM we emit the jump tables inline.
2033 UNREACHABLE(); 2083 UNREACHABLE();
(...skipping 19 matching lines...) Expand all
2053 padding_size -= v8::internal::Assembler::kInstrSize; 2103 padding_size -= v8::internal::Assembler::kInstrSize;
2054 } 2104 }
2055 } 2105 }
2056 } 2106 }
2057 2107
2058 #undef __ 2108 #undef __
2059 2109
2060 } // namespace compiler 2110 } // namespace compiler
2061 } // namespace internal 2111 } // namespace internal
2062 } // namespace v8 2112 } // namespace v8
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