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Side by Side Diff: test/cctest/test-assembler-arm.cc

Issue 2523933002: [Turbofan] Add ARM support for simd128 moves and swaps. (Closed)
Patch Set: Created 4 years ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1282 1282
1283 // The same expansion, but with different source and destination registers. 1283 // The same expansion, but with different source and destination registers.
1284 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, srcA0)))); 1284 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, srcA0))));
1285 __ vld1(Neon8, NeonListOperand(d1), NeonMemOperand(r4)); 1285 __ vld1(Neon8, NeonListOperand(d1), NeonMemOperand(r4));
1286 __ vmovl(NeonU8, q1, d1); 1286 __ vmovl(NeonU8, q1, d1);
1287 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, dstA4)))); 1287 __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, dstA4))));
1288 __ vst1(Neon8, NeonListOperand(d2, 2), NeonMemOperand(r4)); 1288 __ vst1(Neon8, NeonListOperand(d2, 2), NeonMemOperand(r4));
1289 1289
1290 __ ldm(ia_w, sp, r4.bit() | pc.bit()); 1290 __ ldm(ia_w, sp, r4.bit() | pc.bit());
1291 1291
1292 // Test vmov for q-registers.
1293 __ vmov(q0, q1);
martyn.capewell 2016/11/23 20:08:46 The results from these vmov instructions aren't wr
bbudge 2016/11/24 02:22:53 Done.
1294 __ vmov(q8, q9);
1295
1292 CodeDesc desc; 1296 CodeDesc desc;
1293 assm.GetCode(&desc); 1297 assm.GetCode(&desc);
1294 Handle<Code> code = isolate->factory()->NewCode( 1298 Handle<Code> code = isolate->factory()->NewCode(
1295 desc, Code::ComputeFlags(Code::STUB), Handle<Code>()); 1299 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
1296 #ifdef DEBUG 1300 #ifdef DEBUG
1297 OFStream os(stdout); 1301 OFStream os(stdout);
1298 code->Print(os); 1302 code->Print(os);
1299 #endif 1303 #endif
1300 F3 f = FUNCTION_CAST<F3>(code->entry()); 1304 F3 f = FUNCTION_CAST<F3>(code->entry());
1301 t.src0 = 0x01020304; 1305 t.src0 = 0x01020304;
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2874 { 2878 {
2875 uint64_t strh = 0; 2879 uint64_t strh = 0;
2876 uint64_t str = 0; 2880 uint64_t str = 0;
2877 dummy = CALL_GENERATED_CODE(isolate, f, &strh, &str, 3, 0xfedcba98, 0); 2881 dummy = CALL_GENERATED_CODE(isolate, f, &strh, &str, 3, 0xfedcba98, 0);
2878 CHECK_EQ(UINT64_C(0x000000ba98000000), strh); 2882 CHECK_EQ(UINT64_C(0x000000ba98000000), strh);
2879 CHECK_EQ(UINT64_C(0x00fedcba98000000), str); 2883 CHECK_EQ(UINT64_C(0x00fedcba98000000), str);
2880 } 2884 }
2881 } 2885 }
2882 2886
2883 TEST(vswp) { 2887 TEST(vswp) {
2888 if (!CpuFeatures::IsSupported(NEON)) return;
2889
2884 CcTest::InitializeVM(); 2890 CcTest::InitializeVM();
2885 Isolate* isolate = CcTest::i_isolate(); 2891 Isolate* isolate = CcTest::i_isolate();
2886 HandleScope scope(isolate); 2892 HandleScope scope(isolate);
2887 Assembler assm(isolate, NULL, 0); 2893 Assembler assm(isolate, NULL, 0);
2888 2894
2889 typedef struct { 2895 typedef struct {
2890 double result0; 2896 double result0;
2891 double result1; 2897 double result1;
2892 double result2; 2898 double result2;
2893 double result3; 2899 double result3;
2900 double result4;
2901 double result5;
2902 double result6;
2903 double result7;
2894 } T; 2904 } T;
2895 T t; 2905 T t;
2896 2906
2897 __ vmov(d0, 1.0); 2907 __ vmov(d0, 1.0);
2898 __ vmov(d1, -1.0); 2908 __ vmov(d1, -1.0);
2899 __ vswp(d0, d1); 2909 __ vswp(d0, d1);
2900 __ vstr(d0, r0, offsetof(T, result0)); 2910 __ vstr(d0, r0, offsetof(T, result0));
2901 __ vstr(d1, r0, offsetof(T, result1)); 2911 __ vstr(d1, r0, offsetof(T, result1));
2902 2912
2903 if (CpuFeatures::IsSupported(VFP32DREGS)) { 2913 if (CpuFeatures::IsSupported(VFP32DREGS)) {
2904 __ vmov(d30, 1.0); 2914 __ vmov(d30, 1.0);
2905 __ vmov(d31, -1.0); 2915 __ vmov(d31, -1.0);
2906 __ vswp(d30, d31); 2916 __ vswp(d30, d31);
2917 __ vswp(q8, q9);
martyn.capewell 2016/11/23 20:08:46 What does this test?
bbudge 2016/11/24 02:22:53 I eliminated this. Kept the test for lower q-regs.
2907 __ vstr(d30, r0, offsetof(T, result2)); 2918 __ vstr(d30, r0, offsetof(T, result2));
2908 __ vstr(d31, r0, offsetof(T, result3)); 2919 __ vstr(d31, r0, offsetof(T, result3));
2909 } 2920 }
2910 2921
2922 // q-register swap.
2923 __ vmov(d8, 1.0);
2924 __ vmov(d9, 2.0);
2925 __ vmov(d10, 3.0);
2926 __ vmov(d11, 4.0);
2927 __ vswp(q4, q5);
2928 __ vstr(d8, r0, offsetof(T, result4));
2929 __ vstr(d9, r0, offsetof(T, result5));
2930 __ vstr(d10, r0, offsetof(T, result6));
2931 __ vstr(d11, r0, offsetof(T, result7));
2932
2911 __ bx(lr); 2933 __ bx(lr);
2912 2934
2913 CodeDesc desc; 2935 CodeDesc desc;
2914 assm.GetCode(&desc); 2936 assm.GetCode(&desc);
2915 Handle<Code> code = isolate->factory()->NewCode( 2937 Handle<Code> code = isolate->factory()->NewCode(
2916 desc, Code::ComputeFlags(Code::STUB), Handle<Code>()); 2938 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
2917 #ifdef DEBUG 2939 #ifdef DEBUG
2918 OFStream os(stdout); 2940 OFStream os(stdout);
2919 code->Print(os); 2941 code->Print(os);
2920 #endif 2942 #endif
2921 F3 f = FUNCTION_CAST<F3>(code->entry()); 2943 F3 f = FUNCTION_CAST<F3>(code->entry());
2922 Object* dummy = CALL_GENERATED_CODE(isolate, f, &t, 0, 0, 0, 0); 2944 Object* dummy = CALL_GENERATED_CODE(isolate, f, &t, 0, 0, 0, 0);
2923 USE(dummy); 2945 USE(dummy);
2924 CHECK_EQ(-1.0, t.result0); 2946 CHECK_EQ(-1.0, t.result0);
2925 CHECK_EQ(1.0, t.result1); 2947 CHECK_EQ(1.0, t.result1);
2926 if (CpuFeatures::IsSupported(VFP32DREGS)) { 2948 if (CpuFeatures::IsSupported(VFP32DREGS)) {
2927 CHECK_EQ(-1.0, t.result2); 2949 CHECK_EQ(-1.0, t.result2);
2928 CHECK_EQ(1.0, t.result3); 2950 CHECK_EQ(1.0, t.result3);
2929 } 2951 }
2952 CHECK_EQ(3.0, t.result4);
2953 CHECK_EQ(4.0, t.result5);
2954 CHECK_EQ(1.0, t.result6);
2955 CHECK_EQ(2.0, t.result7);
2930 } 2956 }
2931 2957
2932 TEST(regress4292_b) { 2958 TEST(regress4292_b) {
2933 CcTest::InitializeVM(); 2959 CcTest::InitializeVM();
2934 Isolate* isolate = CcTest::i_isolate(); 2960 Isolate* isolate = CcTest::i_isolate();
2935 HandleScope scope(isolate); 2961 HandleScope scope(isolate);
2936 2962
2937 Assembler assm(isolate, NULL, 0); 2963 Assembler assm(isolate, NULL, 0);
2938 Label end; 2964 Label end;
2939 __ mov(r0, Operand(isolate->factory()->infinity_value())); 2965 __ mov(r0, Operand(isolate->factory()->infinity_value()));
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2980 HandleScope scope(isolate); 3006 HandleScope scope(isolate);
2981 3007
2982 Assembler assm(isolate, NULL, 0); 3008 Assembler assm(isolate, NULL, 0);
2983 __ mov(r0, Operand(isolate->factory()->infinity_value())); 3009 __ mov(r0, Operand(isolate->factory()->infinity_value()));
2984 __ BlockConstPoolFor(1019); 3010 __ BlockConstPoolFor(1019);
2985 for (int i = 0; i < 1019; ++i) __ nop(); 3011 for (int i = 0; i < 1019; ++i) __ nop();
2986 __ vldr(d0, MemOperand(r0, 0)); 3012 __ vldr(d0, MemOperand(r0, 0));
2987 } 3013 }
2988 3014
2989 #undef __ 3015 #undef __
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