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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | |
| 2 // Use of this source code is governed by a BSD-style license that can be | |
| 3 // found in the LICENSE file. | |
| 4 | |
| 5 #if V8_TARGET_ARCH_PPC | |
| 6 | |
| 7 #include "src/codegen.h" | |
| 8 #include "src/ic/ic.h" | |
| 9 #include "src/ic/stub-cache.h" | |
| 10 #include "src/interface-descriptors.h" | |
| 11 | |
| 12 namespace v8 { | |
| 13 namespace internal { | |
| 14 | |
| 15 #define __ ACCESS_MASM(masm) | |
| 16 | |
| 17 static void ProbeTable(StubCache* stub_cache, MacroAssembler* masm, | |
| 18 StubCache::Table table, Register receiver, Register name, | |
| 19 // The offset is scaled by 4, based on | |
| 20 // kCacheIndexShift, which is two bits | |
| 21 Register offset, Register scratch, Register scratch2, | |
| 22 Register offset_scratch) { | |
| 23 ExternalReference key_offset(stub_cache->key_reference(table)); | |
| 24 ExternalReference value_offset(stub_cache->value_reference(table)); | |
| 25 ExternalReference map_offset(stub_cache->map_reference(table)); | |
| 26 | |
| 27 uintptr_t key_off_addr = reinterpret_cast<uintptr_t>(key_offset.address()); | |
| 28 uintptr_t value_off_addr = | |
| 29 reinterpret_cast<uintptr_t>(value_offset.address()); | |
| 30 uintptr_t map_off_addr = reinterpret_cast<uintptr_t>(map_offset.address()); | |
| 31 | |
| 32 // Check the relative positions of the address fields. | |
| 33 DCHECK(value_off_addr > key_off_addr); | |
| 34 DCHECK((value_off_addr - key_off_addr) % 4 == 0); | |
| 35 DCHECK((value_off_addr - key_off_addr) < (256 * 4)); | |
| 36 DCHECK(map_off_addr > key_off_addr); | |
| 37 DCHECK((map_off_addr - key_off_addr) % 4 == 0); | |
| 38 DCHECK((map_off_addr - key_off_addr) < (256 * 4)); | |
| 39 | |
| 40 Label miss; | |
| 41 Register base_addr = scratch; | |
| 42 scratch = no_reg; | |
| 43 | |
| 44 // Multiply by 3 because there are 3 fields per entry (name, code, map). | |
| 45 __ ShiftLeftImm(offset_scratch, offset, Operand(1)); | |
| 46 __ add(offset_scratch, offset, offset_scratch); | |
| 47 | |
| 48 // Calculate the base address of the entry. | |
| 49 __ mov(base_addr, Operand(key_offset)); | |
| 50 #if V8_TARGET_ARCH_PPC64 | |
| 51 DCHECK(kPointerSizeLog2 > StubCache::kCacheIndexShift); | |
| 52 __ ShiftLeftImm(offset_scratch, offset_scratch, | |
| 53 Operand(kPointerSizeLog2 - StubCache::kCacheIndexShift)); | |
| 54 #else | |
| 55 DCHECK(kPointerSizeLog2 == StubCache::kCacheIndexShift); | |
| 56 #endif | |
| 57 __ add(base_addr, base_addr, offset_scratch); | |
| 58 | |
| 59 // Check that the key in the entry matches the name. | |
| 60 __ LoadP(ip, MemOperand(base_addr, 0)); | |
| 61 __ cmp(name, ip); | |
| 62 __ bne(&miss); | |
| 63 | |
| 64 // Check the map matches. | |
| 65 __ LoadP(ip, MemOperand(base_addr, map_off_addr - key_off_addr)); | |
| 66 __ LoadP(scratch2, FieldMemOperand(receiver, HeapObject::kMapOffset)); | |
| 67 __ cmp(ip, scratch2); | |
| 68 __ bne(&miss); | |
| 69 | |
| 70 // Get the code entry from the cache. | |
| 71 Register code = scratch2; | |
| 72 scratch2 = no_reg; | |
| 73 __ LoadP(code, MemOperand(base_addr, value_off_addr - key_off_addr)); | |
| 74 | |
| 75 #ifdef DEBUG | |
| 76 if (FLAG_test_secondary_stub_cache && table == StubCache::kPrimary) { | |
| 77 __ b(&miss); | |
| 78 } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) { | |
| 79 __ b(&miss); | |
| 80 } | |
| 81 #endif | |
| 82 | |
| 83 // Jump to the first instruction in the code stub. | |
| 84 __ addi(r0, code, Operand(Code::kHeaderSize - kHeapObjectTag)); | |
| 85 __ mtctr(r0); | |
| 86 __ bctr(); | |
| 87 | |
| 88 // Miss: fall through. | |
| 89 __ bind(&miss); | |
| 90 } | |
| 91 | |
| 92 void StubCache::GenerateProbe(MacroAssembler* masm, Register receiver, | |
| 93 Register name, Register scratch, Register extra, | |
| 94 Register extra2, Register extra3) { | |
| 95 Label miss; | |
| 96 | |
| 97 #if V8_TARGET_ARCH_PPC64 | |
| 98 // Make sure that code is valid. The multiplying code relies on the | |
| 99 // entry size being 24. | |
| 100 DCHECK(sizeof(Entry) == 24); | |
| 101 #else | |
| 102 // Make sure that code is valid. The multiplying code relies on the | |
| 103 // entry size being 12. | |
| 104 DCHECK(sizeof(Entry) == 12); | |
| 105 #endif | |
| 106 | |
| 107 // Make sure that there are no register conflicts. | |
| 108 DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3)); | |
| 109 | |
| 110 // Check scratch, extra and extra2 registers are valid. | |
| 111 DCHECK(!scratch.is(no_reg)); | |
| 112 DCHECK(!extra.is(no_reg)); | |
| 113 DCHECK(!extra2.is(no_reg)); | |
| 114 DCHECK(!extra3.is(no_reg)); | |
| 115 | |
| 116 #ifdef DEBUG | |
| 117 // If vector-based ics are in use, ensure that scratch, extra, extra2 and | |
| 118 // extra3 don't conflict with the vector and slot registers, which need | |
| 119 // to be preserved for a handler call or miss. | |
| 120 if (IC::ICUseVector(ic_kind_)) { | |
| 121 Register vector, slot; | |
| 122 if (ic_kind_ == Code::STORE_IC || ic_kind_ == Code::KEYED_STORE_IC) { | |
| 123 vector = StoreWithVectorDescriptor::VectorRegister(); | |
| 124 slot = StoreWithVectorDescriptor::SlotRegister(); | |
| 125 } else { | |
| 126 DCHECK(ic_kind_ == Code::LOAD_IC || ic_kind_ == Code::KEYED_LOAD_IC); | |
| 127 vector = LoadWithVectorDescriptor::VectorRegister(); | |
| 128 slot = LoadWithVectorDescriptor::SlotRegister(); | |
| 129 } | |
| 130 DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3)); | |
| 131 } | |
| 132 #endif | |
| 133 | |
| 134 Counters* counters = masm->isolate()->counters(); | |
| 135 __ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2, | |
| 136 extra3); | |
| 137 | |
| 138 // Check that the receiver isn't a smi. | |
| 139 __ JumpIfSmi(receiver, &miss); | |
| 140 | |
| 141 // Get the map of the receiver and compute the hash. | |
| 142 __ lwz(scratch, FieldMemOperand(name, Name::kHashFieldOffset)); | |
| 143 __ LoadP(ip, FieldMemOperand(receiver, HeapObject::kMapOffset)); | |
| 144 __ add(scratch, scratch, ip); | |
| 145 __ Xor(scratch, scratch, Operand(kPrimaryMagic)); | |
| 146 // The mask omits the last two bits because they are not part of the hash. | |
| 147 __ andi(scratch, scratch, | |
| 148 Operand((kPrimaryTableSize - 1) << kCacheIndexShift)); | |
| 149 | |
| 150 // Probe the primary table. | |
| 151 ProbeTable(this, masm, kPrimary, receiver, name, scratch, extra, extra2, | |
| 152 extra3); | |
| 153 | |
| 154 // Primary miss: Compute hash for secondary probe. | |
| 155 __ sub(scratch, scratch, name); | |
| 156 __ Add(scratch, scratch, kSecondaryMagic, r0); | |
| 157 __ andi(scratch, scratch, | |
| 158 Operand((kSecondaryTableSize - 1) << kCacheIndexShift)); | |
| 159 | |
| 160 // Probe the secondary table. | |
| 161 ProbeTable(this, masm, kSecondary, receiver, name, scratch, extra, extra2, | |
| 162 extra3); | |
| 163 | |
| 164 // Cache miss: Fall-through and let caller handle the miss by | |
| 165 // entering the runtime system. | |
| 166 __ bind(&miss); | |
| 167 __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1, extra2, | |
| 168 extra3); | |
| 169 } | |
| 170 | |
| 171 | |
| 172 #undef __ | |
| 173 } // namespace internal | |
| 174 } // namespace v8 | |
| 175 | |
| 176 #endif // V8_TARGET_ARCH_PPC | |
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Chromium Code Reviews
Issue 2523473002:
[cleanup] Drop handwritten KeyedStoreIC code (Closed)
