Index: runtime/vm/assembler_arm.cc |
diff --git a/runtime/vm/assembler_arm.cc b/runtime/vm/assembler_arm.cc |
index d712f9825fd722502e49e3af46c84cb2ca294ecf..a7c442d138b943ff68a95599f5f13b1967f1c099 100644 |
--- a/runtime/vm/assembler_arm.cc |
+++ b/runtime/vm/assembler_arm.cc |
@@ -273,12 +273,24 @@ void Assembler::adc(Register rd, Register rn, ShifterOperand so, |
} |
+void Assembler::adcs(Register rd, Register rn, ShifterOperand so, |
+ Condition cond) { |
+ EmitType01(cond, so.type(), ADC, 1, rn, rd, so); |
+} |
+ |
+ |
void Assembler::sbc(Register rd, Register rn, ShifterOperand so, |
Condition cond) { |
EmitType01(cond, so.type(), SBC, 0, rn, rd, so); |
} |
+void Assembler::sbcs(Register rd, Register rn, ShifterOperand so, |
+ Condition cond) { |
+ EmitType01(cond, so.type(), SBC, 1, rn, rd, so); |
+} |
+ |
+ |
void Assembler::rsc(Register rd, Register rn, ShifterOperand so, |
Condition cond) { |
EmitType01(cond, so.type(), RSC, 0, rn, rd, so); |
@@ -2161,6 +2173,11 @@ void Assembler::Rrx(Register rd, Register rm, Condition cond) { |
} |
+void Assembler::SignFill(Register rd, Register rm) { |
+ Asr(rd, rm, 31); |
+} |
+ |
+ |
void Assembler::Vreciprocalqs(QRegister qd, QRegister qm) { |
ASSERT(qm != QTMP); |
ASSERT(qd != QTMP); |