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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. |
6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
7 | 7 |
8 #include "vm/flow_graph_compiler.h" | 8 #include "vm/flow_graph_compiler.h" |
9 | 9 |
10 #include "vm/ast_printer.h" | 10 #include "vm/ast_printer.h" |
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1439 DRegister d2 = OddDRegisterOf(fpu_reg); | 1439 DRegister d2 = OddDRegisterOf(fpu_reg); |
1440 // TOOD(regis): merge stores using vstmd instruction. | 1440 // TOOD(regis): merge stores using vstmd instruction. |
1441 __ vstrd(d1, Address(SP, offset)); | 1441 __ vstrd(d1, Address(SP, offset)); |
1442 __ vstrd(d2, Address(SP, offset + 2 * kWordSize)); | 1442 __ vstrd(d2, Address(SP, offset + 2 * kWordSize)); |
1443 offset += kFpuRegisterSize; | 1443 offset += kFpuRegisterSize; |
1444 } | 1444 } |
1445 } | 1445 } |
1446 ASSERT(offset == (fpu_regs_count * kFpuRegisterSize)); | 1446 ASSERT(offset == (fpu_regs_count * kFpuRegisterSize)); |
1447 } | 1447 } |
1448 | 1448 |
1449 // Store general purpose registers with the lowest register number at the | 1449 // Store general purpose registers with the highest register number at the |
1450 // lowest address. | 1450 // lowest address. |
1451 const intptr_t cpu_registers = locs->live_registers()->cpu_registers(); | 1451 for (intptr_t reg_idx = 0; reg_idx < kNumberOfCpuRegisters; ++reg_idx) { |
1452 ASSERT((cpu_registers & ~kAllCpuRegistersList) == 0); | 1452 Register reg = static_cast<Register>(reg_idx); |
1453 if (cpu_registers != 0) { | 1453 if (locs->live_registers()->ContainsRegister(reg)) { |
1454 __ PushList(cpu_registers); | 1454 __ Push(reg); |
1455 } | |
regis
2014/05/22 17:09:40
Is there a good reason for this change? It should
Cutch
2014/05/23 21:33:54
Yes, there was a very serious bug where the stackm
regis
2014/05/23 22:36:59
Cool you found it!
| |
1455 } | 1456 } |
1456 } | 1457 } |
1457 | 1458 |
1458 | 1459 |
1459 void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) { | 1460 void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) { |
1460 // General purpose registers have the lowest register number at the | 1461 // General purpose registers have the highest register number at the |
1461 // lowest address. | 1462 // lowest address. |
1462 const intptr_t cpu_registers = locs->live_registers()->cpu_registers(); | 1463 for (intptr_t reg_idx = kNumberOfCpuRegisters - 1; reg_idx >= 0; --reg_idx) { |
1463 ASSERT((cpu_registers & ~kAllCpuRegistersList) == 0); | 1464 Register reg = static_cast<Register>(reg_idx); |
1464 if (cpu_registers != 0) { | 1465 if (locs->live_registers()->ContainsRegister(reg)) { |
1465 __ PopList(cpu_registers); | 1466 __ Pop(reg); |
1467 } | |
1466 } | 1468 } |
1467 | 1469 |
1468 const intptr_t fpu_regs_count = locs->live_registers()->FpuRegisterCount(); | 1470 const intptr_t fpu_regs_count = locs->live_registers()->FpuRegisterCount(); |
1469 if (fpu_regs_count > 0) { | 1471 if (fpu_regs_count > 0) { |
1470 // Fpu registers have the lowest register number at the lowest address. | 1472 // Fpu registers have the lowest register number at the lowest address. |
1471 intptr_t offset = 0; | 1473 intptr_t offset = 0; |
1472 for (intptr_t reg_idx = 0; reg_idx < kNumberOfFpuRegisters; ++reg_idx) { | 1474 for (intptr_t reg_idx = 0; reg_idx < kNumberOfFpuRegisters; ++reg_idx) { |
1473 QRegister fpu_reg = static_cast<QRegister>(reg_idx); | 1475 QRegister fpu_reg = static_cast<QRegister>(reg_idx); |
1474 if (locs->live_registers()->ContainsFpuRegister(fpu_reg)) { | 1476 if (locs->live_registers()->ContainsFpuRegister(fpu_reg)) { |
1475 DRegister d1 = EvenDRegisterOf(fpu_reg); | 1477 DRegister d1 = EvenDRegisterOf(fpu_reg); |
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1815 DRegister dreg = EvenDRegisterOf(reg); | 1817 DRegister dreg = EvenDRegisterOf(reg); |
1816 __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex)); | 1818 __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex)); |
1817 } | 1819 } |
1818 | 1820 |
1819 | 1821 |
1820 #undef __ | 1822 #undef __ |
1821 | 1823 |
1822 } // namespace dart | 1824 } // namespace dart |
1823 | 1825 |
1824 #endif // defined TARGET_ARCH_ARM | 1826 #endif // defined TARGET_ARCH_ARM |
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