Use GPRs for mints

runtime/vm/flow_graph_allocator.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/flow_graph_allocator.h"
 
 #include "vm/bit_vector.h"
 #include "vm/intermediate_language.h"
 #include "vm/il_printer.h"
 #include "vm/flow_graph.h"
@@ skipping 380 matching lines @@
     UNREACHABLE();
   }
 }
 
 
 void LiveRange::Print() {
   if (first_use_interval() == NULL) {
     return;
   }
 
-  OS::Print("  live range v%" Pd " [%" Pd ", %" Pd ") in ",
-            vreg(), Start(), End());
+  OS::Print("  live range v%" Pd " [%" Pd ", %" Pd ") in ", vreg(),
+                                                            Start(),
+                                                            End());
   assigned_location().Print();
+  if (spill_slot_.HasStackIndex()) {
+    intptr_t stack_slot = spill_slot_.stack_index();
+    OS::Print(" allocated spill slot: %" Pd "", stack_slot);
+  }
   OS::Print("\n");
 
+  SafepointPosition* safepoint = first_safepoint();
+  while (safepoint != NULL) {
+    OS::Print("    Safepoint [%" Pd "]: ", safepoint->pos());
+    safepoint->locs()->stack_bitmap()->Print();
+    OS::Print("\n");
+    safepoint = safepoint->next();
+  }
+
   UsePosition* use_pos = uses_;
   for (UseInterval* interval = first_use_interval_;
        interval != NULL;
        interval = interval->next()) {
     OS::Print("    use interval [%" Pd ", %" Pd ")\n",
               interval->start(),
               interval->end());
     while ((use_pos != NULL) && (use_pos->pos() <= interval->end())) {
       OS::Print("      use at %" Pd "", use_pos->pos());
       if (use_pos->location_slot() != NULL) {
@@ skipping 141 matching lines @@
                     start,
                     ToInstructionEnd(start));
     }
   }
 
   // Process incoming parameters and constants.  Do this after all other
   // instructions so that safepoints for all calls have already been found.
   GraphEntryInstr* graph_entry = flow_graph_.graph_entry();
   for (intptr_t i = 0; i < graph_entry->initial_definitions()->length(); i++) {
     Definition* defn = (*graph_entry->initial_definitions())[i];
+    ASSERT(!defn->HasPairRepresentation());
     LiveRange* range = GetLiveRange(defn->ssa_temp_index());
     range->AddUseInterval(graph_entry->start_pos(), graph_entry->end_pos());
     range->DefineAt(graph_entry->start_pos());
     ProcessInitialDefinition(defn, range, graph_entry);
   }
 }
 
 
 void FlowGraphAllocator::ProcessInitialDefinition(Definition* defn,
                                                   LiveRange* range,
@@ skipping 28 matching lines @@
         SplitBetween(range, block->start_pos(), use->pos());
     // Parameters and constants are tagged, so allocated to CPU registers.
     CompleteRange(tail, Location::kRegister);
   }
   ConvertAllUses(range);
   if (defn->IsParameter() && (range->spill_slot().stack_index() >= 0)) {
     // Parameters above the frame pointer consume spill slots and are marked
     // in stack maps.
     spill_slots_.Add(range_end);
     quad_spill_slots_.Add(false);
+    untagged_spill_slots_.Add(false);
+    // Note, all incoming parameters are assumed to be tagged.
     MarkAsObjectAtSafepoints(range);
   } else if (defn->IsConstant() && block->IsCatchBlockEntry()) {
     // Constants at catch block entries consume spill slots.
     spill_slots_.Add(range_end);
     quad_spill_slots_.Add(false);
+    untagged_spill_slots_.Add(false);
   }
 }
 
 
 static Location::Kind RegisterKindFromPolicy(Location loc) {
   if (loc.policy() == Location::kRequiresFpuRegister) {
     return Location::kFpuRegister;
   } else {
     return Location::kRegister;
   }
 }
 
 
 static Location::Kind RegisterKindForResult(Instruction* instr) {
   if ((instr->representation() == kUnboxedDouble) ||
-      (instr->representation() == kUnboxedMint) ||
       (instr->representation() == kUnboxedFloat32x4) ||
       (instr->representation() == kUnboxedInt32x4) ||
       (instr->representation() == kUnboxedFloat64x2) ||
       (instr->representation() == kPairOfUnboxedDouble)) {
     return Location::kFpuRegister;
   } else {
     return Location::kRegister;
   }
 }
 
@@ skipping 149 matching lines @@
     }
 
     const intptr_t block_start_pos = block->start_pos();
     const intptr_t use_pos = current->lifetime_position() + 1;
 
     Location* locations =
         Isolate::Current()->current_zone()->Alloc<Location>(env->Length());
 
     for (intptr_t i = 0; i < env->Length(); ++i) {
       Value* value = env->ValueAt(i);
-      locations[i] = Location::Any();
       Definition* def = value->definition();
+      if (def->HasPairRepresentation()) {
+        locations[i] = Location::Pair(Location::Any(), Location::Any());
+      } else {
+        locations[i] = Location::Any();
+      }
 
       if (def->IsPushArgument()) {
         // Frame size is unknown until after allocation.
         locations[i] = Location::NoLocation();
         continue;
       }
 
       ConstantInstr* constant = def->AsConstant();
       if (constant != NULL) {
         locations[i] = Location::Constant(constant->value());
         continue;
       }
 
       MaterializeObjectInstr* mat = def->AsMaterializeObject();
       if (mat != NULL) {
         // MaterializeObject itself produces no value. But its uses
         // are treated as part of the environment: allocated locations
         // will be used when building deoptimization data.
         locations[i] = Location::NoLocation();
         ProcessMaterializationUses(block, block_start_pos, use_pos, mat);
         continue;
       }
 
-      LiveRange* range = GetLiveRange(def->ssa_temp_index());
-      range->AddUseInterval(block_start_pos, use_pos);
-      range->AddUse(use_pos, &locations[i]);
-
       if (def->HasPairRepresentation()) {
-        LiveRange* range =
+        PairLocation* location_pair = locations[i].AsPairLocation();
+        {
+          // First live range.
+          LiveRange* range = GetLiveRange(def->ssa_temp_index());
+          range->AddUseInterval(block_start_pos, use_pos);
+          range->AddUse(use_pos, location_pair->SlotAt(0));
+        }
+        {
+          // Second live range.
+          LiveRange* range =
             GetLiveRange(ToSecondPairVreg(def->ssa_temp_index()));
+          range->AddUseInterval(block_start_pos, use_pos);
+          range->AddUse(use_pos, location_pair->SlotAt(1));
+        }
+      } else {
+        LiveRange* range = GetLiveRange(def->ssa_temp_index());
         range->AddUseInterval(block_start_pos, use_pos);
         range->AddUse(use_pos, &locations[i]);
       }
     }
 
     env->set_locations(locations);
     env = env->outer();
   }
 }
 
@@ skipping 15 matching lines @@
 
   for (intptr_t i = 0; i < mat->InputCount(); ++i) {
     Definition* def = mat->InputAt(i)->definition();
 
     ConstantInstr* constant = def->AsConstant();
     if (constant != NULL) {
       locations[i] = Location::Constant(constant->value());
       continue;
     }
 
-    locations[i] = Location::Any();
-
-    LiveRange* range = GetLiveRange(def->ssa_temp_index());
-    range->AddUseInterval(block_start_pos, use_pos);
-    range->AddUse(use_pos, &locations[i]);
     if (def->HasPairRepresentation()) {
-      LiveRange* range = GetLiveRange(ToSecondPairVreg(def->ssa_temp_index()));
+      locations[i] = Location::Pair(Location::Any(), Location::Any());
+      PairLocation* location_pair = locations[i].AsPairLocation();
+      {
+        // First live range.
+        LiveRange* range = GetLiveRange(def->ssa_temp_index());
+        range->AddUseInterval(block_start_pos, use_pos);
+        range->AddUse(use_pos, location_pair->SlotAt(0));
+      }
+      {
+        // Second live range.
+        LiveRange* range =
+            GetLiveRange(ToSecondPairVreg(def->ssa_temp_index()));
+        range->AddUseInterval(block_start_pos, use_pos);
+        range->AddUse(use_pos, location_pair->SlotAt(1));
+      }
+    } else {
+      locations[i] = Location::Any();
+      LiveRange* range = GetLiveRange(def->ssa_temp_index());
       range->AddUseInterval(block_start_pos, use_pos);
       range->AddUse(use_pos, &locations[i]);
     }
   }
 
   mat->set_locations(locations);
 }
 
 
 void FlowGraphAllocator::ProcessOneInput(BlockEntryInstr* block,
                                          intptr_t pos,
                                          Location* in_ref,
                                          Value* input,
-                                         intptr_t vreg) {
+                                         intptr_t vreg,
+                                         RegisterSet* live_registers) {
   ASSERT(in_ref != NULL);
   ASSERT(!in_ref->IsPairLocation());
   ASSERT(input != NULL);
   ASSERT(block != NULL);
   LiveRange* range = GetLiveRange(vreg);
   if (in_ref->IsMachineRegister()) {
     // Input is expected in a fixed register. Expected shape of
     // live ranges:
     //
     //                 j' i  i'
     //      value    --*
     //      register   [-----)
     //
+    if (live_registers != NULL) {
+      live_registers->Add(*in_ref, range->representation());
+    }
     MoveOperands* move =
         AddMoveAt(pos - 1, *in_ref, Location::Any());
     BlockLocation(*in_ref, pos - 1, pos + 1);
     range->AddUseInterval(block->start_pos(), pos - 1);
     range->AddHintedUse(pos - 1, move->src_slot(), in_ref);
   } else if (in_ref->IsUnallocated()) {
     if (in_ref->policy() == Location::kWritableRegister) {
       // Writable unallocated input. Expected shape of
       // live ranges:
       //
@@ skipping 191 matching lines @@
   if (locs->out(0).IsUnallocated() &&
       (locs->out(0).policy() == Location::kSameAsFirstInput) &&
       (locs->in(0).IsMachineRegister())) {
     locs->set_out(0, locs->in(0));
   }
 
   const bool output_same_as_first_input =
       locs->out(0).IsUnallocated() &&
       (locs->out(0).policy() == Location::kSameAsFirstInput);
 
+  // Output is same as first input which is a pair.
+  if (output_same_as_first_input && locs->in(0).IsPairLocation()) {
+    // Make out into a PairLocation.
+    locs->set_out(0, Location::Pair(Location::RequiresRegister(),
+                                    Location::RequiresRegister()));
+  }
   // Add uses from the deoptimization environment.
   if (current->env() != NULL) ProcessEnvironmentUses(block, current);
 
   // Process inputs.
   // Skip the first input if output is specified with kSameAsFirstInput policy,
   // they will be processed together at the very end.
   {
     for (intptr_t j = output_same_as_first_input ? 1 : 0;
          j < locs->input_count();
          j++) {
       // Determine if we are dealing with a value pair, and if so, whether
       // the location is the first register or second register.
       Value* input = current->InputAt(j);
       Location* in_ref = locs->in_slot(j);
+      RegisterSet* live_registers = NULL;
+      if (locs->HasCallOnSlowPath()) {
+        live_registers = locs->live_registers();
+      }
       if (in_ref->IsPairLocation()) {
         ASSERT(input->definition()->HasPairRepresentation());
         PairLocation* pair = in_ref->AsPairLocation();
         const intptr_t vreg = input->definition()->ssa_temp_index();
         // Each element of the pair is assigned it's own virtual register number
         // and is allocated its own LiveRange.
         ProcessOneInput(block, pos, pair->SlotAt(0),
-                        input, vreg);
+                        input, vreg, live_registers);
         ProcessOneInput(block, pos, pair->SlotAt(1), input,
-                        ToSecondPairVreg(vreg));
+                        ToSecondPairVreg(vreg), live_registers);
       } else {
         ProcessOneInput(block, pos, in_ref, input,
-                        input->definition()->ssa_temp_index());
+                        input->definition()->ssa_temp_index(), live_registers);
       }
     }
   }
 
   // Process temps.
   for (intptr_t j = 0; j < locs->temp_count(); j++) {
     // Expected shape of live range:
     //
     //              i  i'
     //              [--)
@@ skipping 361 matching lines @@
     Location* loc = use->location_slot();
     if (loc->IsUnallocated() && loc->IsRegisterBeneficial()) {
       first_register_beneficial_use_ = use;
       return use;
     }
   }
   return NULL;
 }
 
 
+UsePosition* AllocationFinger::FirstInterferingUse(intptr_t after) {
+  if (IsInstructionEndPosition(after)) {
+    // If after is a position at the end of the instruction disregard
+    // any use occuring at it.
+    after += 1;
+  }
+  return FirstRegisterUse(after);
+}
+
+
 void AllocationFinger::UpdateAfterSplit(intptr_t first_use_after_split_pos) {
   if ((first_register_use_ != NULL) &&
       (first_register_use_->pos() >= first_use_after_split_pos)) {
     first_register_use_ = NULL;
   }
 
   if ((first_register_beneficial_use_ != NULL) &&
       (first_register_beneficial_use_->pos() >= first_use_after_split_pos)) {
     first_register_beneficial_use_ = NULL;
   }
@@ skipping 153 matching lines @@
     // Split at block's start.
     split_pos = split_block->entry()->lifetime_position();
   } else {
     // Interval [from, to) is contained inside a single block.
 
     // Split at position corresponding to the end of the previous
     // instruction.
     split_pos = ToInstructionStart(to) - 1;
   }
 
-  ASSERT((split_pos != kIllegalPosition) && (from < split_pos));
+  ASSERT(split_pos != kIllegalPosition);
+  ASSERT(from < split_pos);
 
   return range->SplitAt(split_pos);
 }
 
 
 void FlowGraphAllocator::SpillBetween(LiveRange* range,
                                       intptr_t from,
                                       intptr_t to) {
   ASSERT(from < to);
   TRACE_ALLOC(OS::Print("spill v%" Pd " [%" Pd ", %" Pd ") "
@@ skipping 53 matching lines @@
   // During fpu register allocation spill slot indices are computed in terms of
   // double (64bit) stack slots. We treat quad stack slot (128bit) as a
   // consecutive pair of two double spill slots.
   // Special care is taken to never allocate the same index to both
   // double and quad spill slots as it complicates disambiguation during
   // parallel move resolution.
   const bool need_quad = (register_kind_ == Location::kFpuRegister) &&
       ((range->representation() == kUnboxedFloat32x4) ||
        (range->representation() == kUnboxedInt32x4)   ||
        (range->representation() == kUnboxedFloat64x2));
+  const bool need_untagged = (register_kind_ == Location::kRegister) &&
+      ((range->representation() == kUntagged));
 
   // Search for a free spill slot among allocated: the value in it should be
   // dead and its type should match (e.g. it should not be a part of the quad if
   // we are allocating normal double slot).
   // For CPU registers we need to take reserved slots for try-catch into
   // account.
   intptr_t idx = register_kind_ == Location::kRegister
       ? flow_graph_.graph_entry()->fixed_slot_count()
       : 0;
   for (; idx < spill_slots_.length(); idx++) {
     if ((need_quad == quad_spill_slots_[idx]) &&
+        (need_untagged == untagged_spill_slots_[idx]) &&
         (spill_slots_[idx] <= start)) {
       break;
     }
   }
 
   if (idx == spill_slots_.length()) {
     // No free spill slot found. Allocate a new one.
     spill_slots_.Add(0);
     quad_spill_slots_.Add(need_quad);
+    untagged_spill_slots_.Add(need_untagged);
     if (need_quad) {  // Allocate two double stack slots if we need quad slot.
       spill_slots_.Add(0);
       quad_spill_slots_.Add(need_quad);
+      untagged_spill_slots_.Add(need_untagged);
     }
   }
 
   // Set spill slot expiration boundary to the live range's end.
   spill_slots_[idx] = end;
   if (need_quad) {
     ASSERT(quad_spill_slots_[idx] && quad_spill_slots_[idx + 1]);
     idx++;  // Use the higher index it corresponds to the lower stack address.
     spill_slots_[idx] = end;
   } else {
@@ skipping 10 matching lines @@
     const intptr_t slot_idx = cpu_spill_slot_count_ +
         idx * kDoubleSpillFactor + (kDoubleSpillFactor - 1);
 
     Location location;
     if ((range->representation() == kUnboxedFloat32x4) ||
         (range->representation() == kUnboxedInt32x4) ||
         (range->representation() == kUnboxedFloat64x2)) {
       ASSERT(need_quad);
       location = Location::QuadStackSlot(slot_idx);
     } else {
-      ASSERT((range->representation() == kUnboxedDouble) ||
-             (range->representation() == kUnboxedMint));
+      ASSERT((range->representation() == kUnboxedDouble));
       location = Location::DoubleStackSlot(slot_idx);
     }
     range->set_spill_slot(location);
   }
 
   spilled_.Add(range);
 }
 
 
 void FlowGraphAllocator::MarkAsObjectAtSafepoints(LiveRange* range) {
   intptr_t stack_index = range->spill_slot().stack_index();
   ASSERT(stack_index >= 0);
 
   while (range != NULL) {
     for (SafepointPosition* safepoint = range->first_safepoint();
          safepoint != NULL;
          safepoint = safepoint->next()) {
+      // Mark the stack slot as having an object.
       safepoint->locs()->stack_bitmap()->Set(stack_index, true);
     }
     range = range->next_sibling();
   }
 }
 
 
 void FlowGraphAllocator::Spill(LiveRange* range) {
   LiveRange* parent = GetLiveRange(range->vreg());
   if (parent->spill_slot().IsInvalid()) {
@@ skipping 338 matching lines @@
     UseInterval* first_pending_use_interval =
         allocated->finger()->first_pending_use_interval();
     if (first_pending_use_interval->Contains(start)) {
       // This is an active interval.
       if (allocated->vreg() < 0) {
         // This register blocked by an interval that
         // can't be spilled.
         return false;
       }
 
-      const UsePosition* use =
-          allocated->finger()->FirstRegisterBeneficialUse(unallocated->Start());
-
+      UsePosition* use =
+          allocated->finger()->FirstInterferingUse(start);
       if ((use != NULL) && ((ToInstructionStart(use->pos()) - start) <= 1)) {
         // This register is blocked by interval that is used
         // as register in the current instruction and can't
         // be spilled.
         return false;
       }
 
       const intptr_t use_pos = (use != NULL) ? use->pos()
                                              : allocated->End();
 
@@ skipping 59 matching lines @@
 bool FlowGraphAllocator::EvictIntersection(LiveRange* allocated,
                                            LiveRange* unallocated) {
   UseInterval* first_unallocated =
       unallocated->finger()->first_pending_use_interval();
   const intptr_t intersection = FirstIntersection(
       allocated->finger()->first_pending_use_interval(),
       first_unallocated);
   if (intersection == kMaxPosition) return false;
 
   const intptr_t spill_position = first_unallocated->start();
-  UsePosition* use = allocated->finger()->FirstRegisterUse(spill_position);
+  UsePosition* use = allocated->finger()->FirstInterferingUse(spill_position);
   if (use == NULL) {
     // No register uses after this point.
     SpillAfter(allocated, spill_position);
   } else {
     const intptr_t restore_position =
         (spill_position < intersection) ? MinPosition(intersection, use->pos())
                                         : use->pos();
 
     SpillBetween(allocated, spill_position, restore_position);
   }
@@ skipping 14 matching lines @@
     parallel_move = CreateParallelMoveBefore(instr, pos);
   } else {
     parallel_move = CreateParallelMoveAfter(instr, pos);
   }
 
   return parallel_move->AddMove(to, from);
 }
 
 
 void FlowGraphAllocator::ConvertUseTo(UsePosition* use, Location loc) {
+  ASSERT(!loc.IsPairLocation());
   ASSERT(use->location_slot() != NULL);
   Location* slot = use->location_slot();
   ASSERT(slot->IsUnallocated());
   TRACE_ALLOC(OS::Print("  use at %" Pd " converted to ", use->pos()));
   TRACE_ALLOC(loc.Print());
   TRACE_ALLOC(OS::Print("\n"));
   *slot = loc;
 }
 
 
@@ skipping 14 matching lines @@
   }
 
   // Add live registers at all safepoints for instructions with slow-path
   // code.
   if (loc.IsMachineRegister()) {
     for (SafepointPosition* safepoint = range->first_safepoint();
          safepoint != NULL;
          safepoint = safepoint->next()) {
       if (!safepoint->locs()->always_calls()) {
         ASSERT(safepoint->locs()->can_call());
-        safepoint->locs()->live_registers()->Add(loc);
+        safepoint->locs()->live_registers()->Add(loc, range->representation());
       }
     }
   }
 }
 
 
 void FlowGraphAllocator::AdvanceActiveIntervals(const intptr_t start) {
   for (intptr_t reg = 0; reg < NumberOfRegisters(); reg++) {
     if (registers_[reg]->is_empty()) continue;
 
@@ skipping 298 matching lines @@
       ASSERT(range->assigned_location().Equals(range->spill_slot()));
     } else {
       AddMoveAt(range->Start() + 1,
                 range->spill_slot(),
                 range->assigned_location());
     }
   }
 }
 
 
+static Representation RepresentationForRange(Representation definition_rep) {
+  if (definition_rep == kUnboxedMint) {
+    // kUnboxedMint is split into two ranges, each of which are kUntagged.
+    return kUntagged;
+  }
+  return definition_rep;
+}
+
+
 void FlowGraphAllocator::CollectRepresentations() {
   // Parameters.
   GraphEntryInstr* graph_entry = flow_graph_.graph_entry();
   for (intptr_t i = 0; i < graph_entry->initial_definitions()->length(); ++i) {
     Definition* def = (*graph_entry->initial_definitions())[i];
-    value_representations_[def->ssa_temp_index()] = def->representation();
+    value_representations_[def->ssa_temp_index()] =
+        RepresentationForRange(def->representation());
     ASSERT(!def->HasPairRepresentation());
   }
 
   for (BlockIterator it = flow_graph_.reverse_postorder_iterator();
        !it.Done();
        it.Advance()) {
     BlockEntryInstr* block = it.Current();
 
     // Catch entry.
     if (block->IsCatchBlockEntry()) {
       CatchBlockEntryInstr* catch_entry = block->AsCatchBlockEntry();
       for (intptr_t i = 0;
            i < catch_entry->initial_definitions()->length();
            ++i) {
         Definition* def = (*catch_entry->initial_definitions())[i];
-        value_representations_[def->ssa_temp_index()] = def->representation();
+        ASSERT(!def->HasPairRepresentation());
+        value_representations_[def->ssa_temp_index()] =
+            RepresentationForRange(def->representation());
       }
     }
     // Phis.
     if (block->IsJoinEntry()) {
       JoinEntryInstr* join = block->AsJoinEntry();
       for (PhiIterator it(join); !it.Done(); it.Advance()) {
         // TODO(johnmccutchan): Fix handling of PhiInstr with PairLocation.
         PhiInstr* phi = it.Current();
         if ((phi != NULL) && (phi->ssa_temp_index() >= 0)) {
-          value_representations_[phi->ssa_temp_index()] = phi->representation();
+          ASSERT(!phi->HasPairRepresentation());
+          value_representations_[phi->ssa_temp_index()] =
+              RepresentationForRange(phi->representation());
         }
       }
     }
     // Normal instructions.
     for (ForwardInstructionIterator instr_it(block);
          !instr_it.Done();
          instr_it.Advance()) {
       Definition* def = instr_it.Current()->AsDefinition();
       if ((def != NULL) && (def->ssa_temp_index() >= 0)) {
         const intptr_t vreg = def->ssa_temp_index();
-        value_representations_[vreg] = def->representation();
+        value_representations_[vreg] =
+            RepresentationForRange(def->representation());
         if (def->HasPairRepresentation()) {
-         value_representations_[ToSecondPairVreg(vreg)] = def->representation();
+         value_representations_[ToSecondPairVreg(vreg)] =
+            RepresentationForRange(def->representation());
         }
       }
     }
   }
 }
 
 
 void FlowGraphAllocator::AllocateRegisters() {
   CollectRepresentations();
 
@@ skipping 27 matching lines @@
   PrepareForAllocation(Location::kRegister,
                        kNumberOfCpuRegisters,
                        unallocated_cpu_,
                        cpu_regs_,
                        blocked_cpu_registers_);
   AllocateUnallocatedRanges();
 
   cpu_spill_slot_count_ = spill_slots_.length();
   spill_slots_.Clear();
   quad_spill_slots_.Clear();
+  untagged_spill_slots_.Clear();
 
   PrepareForAllocation(Location::kFpuRegister,
                        kNumberOfFpuRegisters,
                        unallocated_xmm_,
                        fpu_regs_,
                        blocked_fpu_registers_);
   AllocateUnallocatedRanges();
 
   ResolveControlFlow();
 
@@ skipping 13 matching lines @@
     OS::Print("-- [after ssa allocator] ir [%s] -------------\n",
               function.ToFullyQualifiedCString());
     FlowGraphPrinter printer(flow_graph_, true);
     printer.PrintBlocks();
     OS::Print("----------------------------------------------\n");
   }
 }
 
 
 }  // namespace dart