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Issue 2522283003: s390: introduce DUMY opcode for special use. (Closed)
Patch Set: make sure not overwrite opcode field Created 4 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // A Disassembler object is used to disassemble a block of code instruction by 5 // A Disassembler object is used to disassemble a block of code instruction by
6 // instruction. The default implementation of the NameConverter object can be 6 // instruction. The default implementation of the NameConverter object can be
7 // overriden to modify register names or to do symbol lookup on addresses. 7 // overriden to modify register names or to do symbol lookup on addresses.
8 // 8 //
9 // The example below will disassemble a block of code and print it to stdout. 9 // The example below will disassemble a block of code and print it to stdout.
10 // 10 //
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1045 // Disassembles Six Byte S390 Instructions 1045 // Disassembles Six Byte S390 Instructions
1046 // @return true if successfully decoded 1046 // @return true if successfully decoded
1047 bool Decoder::DecodeSixByte(Instruction* instr) { 1047 bool Decoder::DecodeSixByte(Instruction* instr) {
1048 // Print the Instruction bits. 1048 // Print the Instruction bits.
1049 out_buffer_pos_ += 1049 out_buffer_pos_ +=
1050 SNPrintF(out_buffer_ + out_buffer_pos_, "%012" PRIx64 " ", 1050 SNPrintF(out_buffer_ + out_buffer_pos_, "%012" PRIx64 " ",
1051 instr->InstructionBits<SixByteInstr>()); 1051 instr->InstructionBits<SixByteInstr>());
1052 1052
1053 Opcode opcode = instr->S390OpcodeValue(); 1053 Opcode opcode = instr->S390OpcodeValue();
1054 switch (opcode) { 1054 switch (opcode) {
1055 case DUMY:
1056 Format(instr, "dumy\t'r1, 'd2 ( 'r2d, 'r3 )");
1057 break;
1055 case LLILF: 1058 case LLILF:
1056 Format(instr, "llilf\t'r1,'i7"); 1059 Format(instr, "llilf\t'r1,'i7");
1057 break; 1060 break;
1058 case LLIHF: 1061 case LLIHF:
1059 Format(instr, "llihf\t'r1,'i7"); 1062 Format(instr, "llihf\t'r1,'i7");
1060 break; 1063 break;
1061 case AFI: 1064 case AFI:
1062 Format(instr, "afi\t'r1,'i7"); 1065 Format(instr, "afi\t'r1,'i7");
1063 break; 1066 break;
1064 case ASI: 1067 case ASI:
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1474 byte* prev_pc = pc; 1477 byte* prev_pc = pc;
1475 pc += d.InstructionDecode(buffer, pc); 1478 pc += d.InstructionDecode(buffer, pc);
1476 v8::internal::PrintF(f, "%p %08x %s\n", static_cast<void*>(prev_pc), 1479 v8::internal::PrintF(f, "%p %08x %s\n", static_cast<void*>(prev_pc),
1477 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 1480 *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1478 } 1481 }
1479 } 1482 }
1480 1483
1481 } // namespace disasm 1484 } // namespace disasm
1482 1485
1483 #endif // V8_TARGET_ARCH_S390 1486 #endif // V8_TARGET_ARCH_S390
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