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Side by Side Diff: src/IceTargetLoweringMIPS32.cpp

Issue 2519863002: Subzero, MIPS32: Changes for improving sandbox crosstest results (Closed)
Patch Set: Addressed review comments Created 4 years, 1 month ago
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1 // 1 //
2 // The Subzero Code Generator 2 // The Subzero Code Generator
3 // 3 //
4 // This file is distributed under the University of Illinois Open Source 4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details. 5 // License. See LICENSE.TXT for details.
6 // 6 //
7 //===----------------------------------------------------------------------===// 7 //===----------------------------------------------------------------------===//
8 /// 8 ///
9 /// \file 9 /// \file
10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
(...skipping 5826 matching lines...) Expand 10 before | Expand all | Expand 10 after
5837 // tryOptimizedCmpxchgCmpBr(). 5837 // tryOptimizedCmpxchgCmpBr().
5838 Iter->second.Instr->setDead(); 5838 Iter->second.Instr->setDead();
5839 ++Iter; 5839 ++Iter;
5840 } 5840 }
5841 } 5841 }
5842 5842
5843 TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx) 5843 TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx)
5844 : TargetHeaderLowering(Ctx) {} 5844 : TargetHeaderLowering(Ctx) {}
5845 5845
5846 void TargetHeaderMIPS32::lower() { 5846 void TargetHeaderMIPS32::lower() {
5847 if (!BuildDefs::dump())
5848 return;
5847 OstreamLocker L(Ctx); 5849 OstreamLocker L(Ctx);
5848 Ostream &Str = Ctx->getStrEmit(); 5850 Ostream &Str = Ctx->getStrEmit();
5849 Str << "\t.set\t" 5851 Str << "\t.set\t"
5850 << "nomicromips\n"; 5852 << "nomicromips\n";
5851 Str << "\t.set\t" 5853 Str << "\t.set\t"
5852 << "nomips16\n"; 5854 << "nomips16\n";
5853 Str << "\t.set\t" 5855 Str << "\t.set\t"
5854 << "noat\n"; 5856 << "noat\n";
5857 if(getFlags().getUseSandboxing())
5858 Str << "\t.bundle_align_mode 4\n";
5855 } 5859 }
5856 5860
5857 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; 5861 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
5858 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; 5862 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
5859 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; 5863 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
5860 5864
5861 TargetMIPS32::Sandboxer::Sandboxer(TargetMIPS32 *Target, 5865 TargetMIPS32::Sandboxer::Sandboxer(TargetMIPS32 *Target,
5862 InstBundleLock::Option BundleOption) 5866 InstBundleLock::Option BundleOption)
5863 : Target(Target), BundleOption(BundleOption) {} 5867 : Target(Target), BundleOption(BundleOption) {}
5864 5868
(...skipping 16 matching lines...) Expand all
5881 } 5885 }
5882 5886
5883 void TargetMIPS32::Sandboxer::lw(Variable *Dest, OperandMIPS32Mem *Mem) { 5887 void TargetMIPS32::Sandboxer::lw(Variable *Dest, OperandMIPS32Mem *Mem) {
5884 Variable *Base = Mem->getBase(); 5888 Variable *Base = Mem->getBase();
5885 Variable *T7 = Target->getPhysicalRegister(RegMIPS32::Reg_T7); 5889 Variable *T7 = Target->getPhysicalRegister(RegMIPS32::Reg_T7);
5886 if (Target->NeedSandboxing && (Target->getStackReg() != Base->getRegNum())) { 5890 if (Target->NeedSandboxing && (Target->getStackReg() != Base->getRegNum())) {
5887 createAutoBundle(); 5891 createAutoBundle();
5888 Target->_and(Base, Base, T7); 5892 Target->_and(Base, Base, T7);
5889 } 5893 }
5890 Target->_lw(Dest, Mem); 5894 Target->_lw(Dest, Mem);
5895 if (Target->NeedSandboxing && (Dest->getRegNum() == Target->getStackReg()))
5896 Target->_and(Dest, Dest, T7);
5891 } 5897 }
5892 5898
5893 void TargetMIPS32::Sandboxer::sw(Variable *Dest, OperandMIPS32Mem *Mem) { 5899 void TargetMIPS32::Sandboxer::sw(Variable *Dest, OperandMIPS32Mem *Mem) {
5894 Variable *Base = Mem->getBase(); 5900 Variable *Base = Mem->getBase();
5895 Variable *T7 = Target->getPhysicalRegister(RegMIPS32::Reg_T7); 5901 Variable *T7 = Target->getPhysicalRegister(RegMIPS32::Reg_T7);
5896 if (Target->NeedSandboxing && (Target->getStackReg() != Base->getRegNum())) { 5902 if (Target->NeedSandboxing && (Target->getStackReg() != Base->getRegNum())) {
5897 createAutoBundle(); 5903 createAutoBundle();
5898 Target->_and(Base, Base, T7); 5904 Target->_and(Base, Base, T7);
5899 } 5905 }
5900 Target->_sw(Dest, Mem); 5906 Target->_sw(Dest, Mem);
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
5939 void TargetMIPS32::Sandboxer::reset_sp(Variable *Src) { 5945 void TargetMIPS32::Sandboxer::reset_sp(Variable *Src) {
5940 Variable *SP = Target->getPhysicalRegister(RegMIPS32::Reg_SP); 5946 Variable *SP = Target->getPhysicalRegister(RegMIPS32::Reg_SP);
5941 if (!Target->NeedSandboxing) { 5947 if (!Target->NeedSandboxing) {
5942 Target->_mov(SP, Src); 5948 Target->_mov(SP, Src);
5943 return; 5949 return;
5944 } 5950 }
5945 Variable *T7 = Target->getPhysicalRegister(RegMIPS32::Reg_T7); 5951 Variable *T7 = Target->getPhysicalRegister(RegMIPS32::Reg_T7);
5946 createAutoBundle(); 5952 createAutoBundle();
5947 Target->_mov(SP, Src); 5953 Target->_mov(SP, Src);
5948 Target->_and(SP, SP, T7); 5954 Target->_and(SP, SP, T7);
5955 Target->getContext().insert<InstFakeUse>(SP);
5949 } 5956 }
5950 5957
5951 InstMIPS32Call *TargetMIPS32::Sandboxer::jal(Variable *ReturnReg, 5958 InstMIPS32Call *TargetMIPS32::Sandboxer::jal(Variable *ReturnReg,
5952 Operand *CallTarget) { 5959 Operand *CallTarget) {
5953 if (Target->NeedSandboxing) 5960 if (Target->NeedSandboxing) {
5954 createAutoBundle(); 5961 createAutoBundle();
5962 if (auto *CallTargetR = llvm::dyn_cast<Variable>(CallTarget)) {
5963 Variable *T6 = Target->getPhysicalRegister(RegMIPS32::Reg_T6);
5964 Target->_and(CallTargetR, CallTargetR, T6);
5965 }
5966 }
5955 return Target->Context.insert<InstMIPS32Call>(ReturnReg, CallTarget); 5967 return Target->Context.insert<InstMIPS32Call>(ReturnReg, CallTarget);
5956 } 5968 }
5957 5969
5958 } // end of namespace MIPS32 5970 } // end of namespace MIPS32
5959 } // end of namespace Ice 5971 } // end of namespace Ice
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