Removes loads from PP from stubs on arm64.

runtime/vm/assembler_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 383 matching lines @@
          // object pool.
          // TODO(zra): Evaluate putting all VM heap objects into the pool.
          (!object.InVMHeap() || (object.raw() == Object::null()) ||
                                 (object.raw() == Bool::True().raw()) ||
                                 (object.raw() == Bool::False().raw()));
 }
 
 
 bool Assembler::CanLoadImmediateFromPool(int64_t imm, Register pp) {
   return !Utils::IsInt(32, imm) &&
-         (pp != kNoRegister) &&
+         (pp != kNoPP) &&
          (Isolate::Current() != Dart::vm_isolate());
 }
 
 
 void Assembler::LoadExternalLabel(Register dst,
                                   const ExternalLabel* label,
                                   Patchability patchable,
                                   Register pp) {
   const int32_t offset =
       Array::element_offset(FindExternalLabel(label, patchable));
@@ skipping 19 matching lines @@
   if (CanLoadObjectFromPool(object)) {
     LoadObject(TMP, object, pp);
     CompareRegisters(reg, TMP);
   } else {
     CompareImmediate(reg, reinterpret_cast<int64_t>(object.raw()), pp);
   }
 }
 
 
 void Assembler::LoadDecodableImmediate(Register reg, int64_t imm, Register pp) {
-  if ((pp != kNoRegister) && (Isolate::Current() != Dart::vm_isolate())) {
+  if ((pp != kNoPP) && (Isolate::Current() != Dart::vm_isolate())) {
     int64_t val_smi_tag = imm & kSmiTagMask;
     imm &= ~kSmiTagMask;  // Mask off the tag bits.
     const int32_t offset = Array::element_offset(FindImmediate(imm));
     LoadWordFromPoolOffset(reg, pp, offset);
     if (val_smi_tag != 0) {
       // Add back the tag bits.
       orri(reg, reg, val_smi_tag);
     }
   } else {
     // TODO(zra): Since this sequence only needs to be decodable, it can be
@@ skipping 149 matching lines @@
   } else {
     LoadImmediate(TMP2, imm, pp);
     cmp(rn, Operand(TMP2));
   }
 }
 
 
 void Assembler::LoadFromOffset(
     Register dest, Register base, int32_t offset, OperandSize sz) {
   ASSERT(base != TMP2);
-  if (Address::CanHoldOffset(offset)) {
-    ldr(dest, Address(base, offset), sz);
+  if (Address::CanHoldOffset(offset, Address::Offset, sz)) {
+    ldr(dest, Address(base, offset, Address::Offset, sz), sz);
   } else {
     // Since offset is 32-bits, it won't be loaded from the pool.
-    AddImmediate(TMP2, base, offset, kNoRegister);
+    AddImmediate(TMP2, base, offset, kNoPP);
     ldr(dest, Address(TMP2), sz);
   }
 }
 
 
 void Assembler::StoreToOffset(
     Register src, Register base, int32_t offset, OperandSize sz) {
   ASSERT(src != TMP2);
   ASSERT(base != TMP2);
-  if (Address::CanHoldOffset(offset)) {
-    str(src, Address(base, offset), sz);
+  if (Address::CanHoldOffset(offset, Address::Offset, sz)) {
+    str(src, Address(base, offset, Address::Offset, sz), sz);
   } else {
     // Since offset is 32-bits, it won't be loaded from the pool.
-    AddImmediate(TMP2, base, offset, kNoRegister);
+    AddImmediate(TMP2, base, offset, kNoPP);
     str(src, Address(TMP2), sz);
   }
 }
 
 
 // Store into object.
 // Preserves object and value registers.
 void Assembler::StoreIntoObjectFilterNoSmi(Register object,
                                            Register value,
                                            Label* no_update) {
@@ skipping 111 matching lines @@
                                intptr_t class_id) {
   LoadClassId(TMP, object);
   CompareImmediate(TMP, class_id, PP);
 }
 
 
 // Frame entry and exit.
 void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
   // Reserve space for arguments and align frame before entering
   // the C++ world.
-  AddImmediate(SP, SP, -frame_space, kNoRegister);
+  AddImmediate(SP, SP, -frame_space, kNoPP);
   if (OS::ActivationFrameAlignment() > 1) {
     mov(TMP, SP);  // SP can't be register operand of andi.
     andi(TMP, TMP, ~(OS::ActivationFrameAlignment() - 1));
     mov(SP, TMP);
   }
 }
 
 
 void Assembler::EnterFrame(intptr_t frame_size) {
   Push(LR);
@@ skipping 31 matching lines @@
 
 
 void Assembler::EnterDartFrameWithInfo(intptr_t frame_size, Register new_pp) {
   // Setup the frame.
   adr(TMP, -CodeSize());  // TMP gets PC marker.
   EnterFrame(0);
   Push(TMP);  // Save PC Marker.
   TagAndPushPP();  // Save PP.
 
   // Load the pool pointer.
-  if (new_pp == kNoRegister) {
+  if (new_pp == kNoPP) {
     LoadPoolPointer(PP);
   } else {
     mov(PP, new_pp);
   }
 
   // Reserve space.
   if (frame_size > 0) {
     AddImmediate(SP, SP, -frame_size, PP);
   }
 }
 
 
 // On entry to a function compiled for OSR, the caller's frame pointer, the
 // stack locals, and any copied parameters are already in place.  The frame
 // pointer is already set up.  The PC marker is not correct for the
 // optimized function and there may be extra space for spill slots to
 // allocate. We must also set up the pool pointer for the function.
 void Assembler::EnterOsrFrame(intptr_t extra_size, Register new_pp) {
   const intptr_t offset = CodeSize();
 
   Comment("EnterOsrFrame");
   adr(TMP, -CodeSize());
 
-  AddImmediate(TMP, TMP, -offset, kNoRegister);
+  AddImmediate(TMP, TMP, -offset, kNoPP);
   StoreToOffset(TMP, FP, kPcMarkerSlotFromFp * kWordSize);
 
   // Setup pool pointer for this dart function.
-  if (new_pp == kNoRegister) {
+  if (new_pp == kNoPP) {
     LoadPoolPointer(PP);
   } else {
     mov(PP, new_pp);
   }
 
   if (extra_size > 0) {
     AddImmediate(SP, SP, -extra_size, PP);
   }
 }
 
@@ skipping 61 matching lines @@
 void Assembler::LeaveStubFrame() {
   // Restore and untag PP.
   LoadFromOffset(PP, FP, kSavedCallerPpSlotFromFp * kWordSize);
   sub(PP, PP, Operand(kHeapObjectTag));
   LeaveFrame();
 }
 
 
 void Assembler::UpdateAllocationStats(intptr_t cid,
                                       Register temp_reg,
+                                      Register pp,
                                       Heap::Space space) {
   ASSERT(temp_reg != kNoRegister);
   ASSERT(temp_reg != TMP);
   ASSERT(cid > 0);
   Isolate* isolate = Isolate::Current();
   ClassTable* class_table = isolate->class_table();
   if (cid < kNumPredefinedCids) {
     const uword class_heap_stats_table_address =
         class_table->PredefinedClassHeapStatsTableAddress();
     const uword class_offset = cid * sizeof(ClassHeapStats);  // NOLINT
     const uword count_field_offset = (space == Heap::kNew) ?
       ClassHeapStats::allocated_since_gc_new_space_offset() :
       ClassHeapStats::allocated_since_gc_old_space_offset();
-    LoadImmediate(temp_reg, class_heap_stats_table_address + class_offset, PP);
+    LoadImmediate(temp_reg, class_heap_stats_table_address + class_offset, pp);
     const Address& count_address = Address(temp_reg, count_field_offset);
     ldr(TMP, count_address);
-    AddImmediate(TMP, TMP, 1, PP);
+    AddImmediate(TMP, TMP, 1, pp);
     str(TMP, count_address);
   } else {
     ASSERT(temp_reg != kNoRegister);
     const uword class_offset = cid * sizeof(ClassHeapStats);  // NOLINT
     const uword count_field_offset = (space == Heap::kNew) ?
       ClassHeapStats::allocated_since_gc_new_space_offset() :
       ClassHeapStats::allocated_since_gc_old_space_offset();
-    LoadImmediate(temp_reg, class_table->ClassStatsTableAddress(), PP);
+    LoadImmediate(temp_reg, class_table->ClassStatsTableAddress(), pp);
     ldr(temp_reg, Address(temp_reg));
-    AddImmediate(temp_reg, temp_reg, class_offset, PP);
+    AddImmediate(temp_reg, temp_reg, class_offset, pp);
     ldr(TMP, Address(temp_reg, count_field_offset));
-    AddImmediate(TMP, TMP, 1, PP);
+    AddImmediate(TMP, TMP, 1, pp);
     str(TMP, Address(temp_reg, count_field_offset));
   }
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM64