Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(11)

Unified Diff: src/IceTargetLoweringMIPS32.h

Issue 2504253002: [Subzero][MIPS] Implements atomic intrinsics for MIPS32 (Closed)
Patch Set: Included lit tests and formated source code Created 4 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
Index: src/IceTargetLoweringMIPS32.h
diff --git a/src/IceTargetLoweringMIPS32.h b/src/IceTargetLoweringMIPS32.h
index 3722c6fa379b16cbd03ac6f7b4ccdb273aaa4a96..65834642edb042e6dbaf00049fcc0358e8d3f0d6 100644
--- a/src/IceTargetLoweringMIPS32.h
+++ b/src/IceTargetLoweringMIPS32.h
@@ -175,6 +175,10 @@ public:
void _br(CfgNode *Target) { Context.insert<InstMIPS32Br>(Target); }
+ void _br(CfgNode *Target, const InstMIPS32Label *Label) {
+ Context.insert<InstMIPS32Br>(Target, Label);
+ }
+
void _br(CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0,
Operand *Src1, CondMIPS32::Cond Condition) {
Context.insert<InstMIPS32Br>(TargetTrue, TargetFalse, Src0, Src1,
@@ -329,6 +333,10 @@ public:
Context.insert<InstMIPS32Ldc1>(Value, Mem, Reloc);
}
+ void _ll(Variable *Value, OperandMIPS32Mem *Mem) {
+ Context.insert<InstMIPS32Ll>(Value, Mem);
+ }
+
void _lw(Variable *Value, OperandMIPS32Mem *Mem) {
Context.insert<InstMIPS32Lw>(Value, Mem);
}
@@ -474,6 +482,10 @@ public:
Context.insert<InstMIPS32Ori>(Dest, Src, Imm);
}
+ InstMIPS32Sc *_sc(Variable *Value, OperandMIPS32Mem *Mem) {
+ return Context.insert<InstMIPS32Sc>(Value, Mem);
+ }
+
void _sdc1(Variable *Value, OperandMIPS32Mem *Mem) {
Context.insert<InstMIPS32Sdc1>(Value, Mem);
}
@@ -550,6 +562,8 @@ public:
Context.insert<InstMIPS32Swc1>(Value, Mem);
}
+ void _sync() { Context.insert<InstMIPS32Sync>(); }
+
void _teq(Variable *Src0, Variable *Src1, uint32_t TrapCode) {
Context.insert<InstMIPS32Teq>(Src0, Src1, TrapCode);
}
@@ -746,6 +760,8 @@ protected:
void lowerFcmp(const InstFcmp *Instr) override;
void lowerIcmp(const InstIcmp *Instr) override;
void lower64Icmp(const InstIcmp *Instr);
+ void createArithInst(Intrinsics::AtomicRMWOperation Operation, Variable *Dest,
+ Variable *Src0, Variable *Src1);
void lowerIntrinsicCall(const InstIntrinsicCall *Instr) override;
void lowerInsertElement(const InstInsertElement *Instr) override;
void lowerLoad(const InstLoad *Instr) override;

Powered by Google App Engine
This is Rietveld 408576698