[Subzero][MIPS] Implements atomic intrinsics for MIPS32

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 206 matching lines @@
     Cvt_s_d,
     Cvt_s_l,
     Cvt_s_w,
     Div,
     Div_d,
     Div_s,
     Divu,
     La,
     Label,
     Ldc1,
+    Ll,
     Lui,
     Lw,
     Lwc1,
     Mfc1,
     Mfhi,
     Mflo,
     Mov, // actually a pseudo op for addi rd, rs, 0
     Mov_d,
     Mov_s,
     Movf,
     Movn,
     Movn_d,
     Movn_s,
     Movt,
     Movz,
     Movz_d,
     Movz_s,
     Mtc1,
     Mthi,
     Mtlo,
     Mul,
     Mul_d,
     Mul_s,
     Mult,
     Multu,
     Nor,
     Or,
     Ori,
     Ret,
+    Sc,
     Sdc1,
     Sll,
     Sllv,
     Slt,
     Slti,
     Sltiu,
     Sltu,
     Sra,
     Srav,
     Srl,
     Srlv,
     Sqrt_d,
     Sqrt_s,
     Sub,
     Sub_d,
     Sub_s,
     Subu,
     Sw,
     Swc1,
+    Sync,
     Teq,
     Trunc_l_d,
     Trunc_l_s,
     Trunc_w_d,
     Trunc_w_s,
     Xor,
     Xori
   };
 
   static constexpr size_t InstSize = sizeof(uint32_t);
@@ skipping 306 matching lines @@
                                 OperandMIPS32Mem *Mem, RelocOp Reloc = RO_No) {
     return new (Func->allocate<InstMIPS32Load>())
         InstMIPS32Load(Func, Value, Mem, Reloc);
   }
 
   void emit(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Func->getContext()->getStrEmit();
     const Type Ty = getDest()->getType();
-    switch (Ty) {
-    case IceType_i1:
-    case IceType_i8:
-      Str << "\t"
-          << "lb"
-          << "\t";
-      break;
-    case IceType_i16:
-      Str << "\t"
-          << "lh"
-          << "\t";
-      break;
-    case IceType_i32:
-      Str << "\t"
-          << "lw"
-          << "\t";
-      break;
-    case IceType_f32:
-      Str << "\t"
-          << "lwc1"
-          << "\t";
-      break;
-    case IceType_f64:
-      Str << "\t"
-          << "ldc1"
-          << "\t";
-      break;
-    default:
-      llvm_unreachable("InstMIPS32Load unknown type");
+
+    if (getKind() == static_cast<InstKind>(Ll)) {
+      Str << "\t" << Opcode << "\t";
+    } else {
+      switch (Ty) {
+      case IceType_i1:
+      case IceType_i8:
+        Str << "\t"

[Jim Stichnoth, 2016/11/17 05:35:39]

While you're at it...
Instead of
  Str << "\t" << "lb" << "\t";
Use string concatenation for smaller&faster code:
  Str << "\t" "lb" "\t";

(here and below)

[sagar.thakur, 2016/11/17 10:57:28]

Done.

+            << "lb"
+            << "\t";
+        break;
+      case IceType_i16:
+        Str << "\t"
+            << "lh"
+            << "\t";
+        break;
+      case IceType_i32:
+        Str << "\t"
+            << "lw"
+            << "\t";
+        break;
+      case IceType_f32:
+        Str << "\t"
+            << "lwc1"
+            << "\t";
+        break;
+      case IceType_f64:
+        Str << "\t"
+            << "ldc1"
+            << "\t";
+        break;
+      default:
+        llvm_unreachable("InstMIPS32Load unknown type");
+      }
     }
     getDest()->emit(Func);
     Str << ", ";
     emitRelocOp(Str, Reloc);
     getSrc(0)->emit(Func);
   }
 
   void emitIAS(const Cfg *Func) const override {
     (void)Func;
     llvm_unreachable("Not yet implemented");
@@ skipping 36 matching lines @@
     return new (Func->allocate<InstMIPS32Store>())
         InstMIPS32Store(Func, Value, Mem, Reloc);
   }
 
   void emit(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Func->getContext()->getStrEmit();
     assert(getSrcSize() == 2);
     const Type Ty = getSrc(0)->getType();
-    switch (Ty) {
-    case IceType_i1:
-    case IceType_i8:
-      Str << "\t"
-          << "sb"
-          << "\t";
-      break;
-    case IceType_i16:
-      Str << "\t"
-          << "sh"
-          << "\t";
-      break;
-    case IceType_i32:
-      Str << "\t"
-          << "sw"
-          << "\t";
-      break;
-    case IceType_f32:
-      Str << "\t"
-          << "swc1"
-          << "\t";
-      break;
-    case IceType_f64:
-      Str << "\t"
-          << "sdc1"
-          << "\t";
-      break;
-    default:
-      llvm_unreachable("InstMIPS32Store unknown type");
+
+    if (getKind() == static_cast<InstKind>(Sc)) {
+      Str << "\t" << Opcode << "\t";
+    } else {
+      switch (Ty) {
+      case IceType_i1:
+      case IceType_i8:
+        Str << "\t"
+            << "sb"
+            << "\t";
+        break;
+      case IceType_i16:
+        Str << "\t"
+            << "sh"
+            << "\t";
+        break;
+      case IceType_i32:
+        Str << "\t"
+            << "sw"
+            << "\t";
+        break;
+      case IceType_f32:
+        Str << "\t"
+            << "swc1"
+            << "\t";
+        break;
+      case IceType_f64:
+        Str << "\t"
+            << "sdc1"
+            << "\t";
+        break;
+      default:
+        llvm_unreachable("InstMIPS32Store unknown type");
+      }
     }
     getSrc(0)->emit(Func);
     Str << ", ";
     emitRelocOp(Str, Reloc);
     getSrc(1)->emit(Func);
   }
 
   void emitIAS(const Cfg *Func) const override {
     (void)Func;
     llvm_unreachable("InstMIPS32Store: Not yet implemented");
@@ skipping 61 matching lines @@
 
 public:
   /// Create an unconditional branch to a node.
   static InstMIPS32Br *create(Cfg *Func, CfgNode *Target) {
     constexpr CfgNode *NoCondTarget = nullptr;
     constexpr InstMIPS32Label *NoLabel = nullptr;
     return new (Func->allocate<InstMIPS32Br>())
         InstMIPS32Br(Func, NoCondTarget, Target, NoLabel, CondMIPS32::AL);
   }
 
+  static InstMIPS32Br *create(Cfg *Func, CfgNode *Target,
+                              const InstMIPS32Label *Label) {
+    constexpr CfgNode *NoCondTarget = nullptr;
+    return new (Func->allocate<InstMIPS32Br>())
+        InstMIPS32Br(Func, NoCondTarget, Target, Label, CondMIPS32::AL);
+  }
+
   /// Create a conditional branch to the false node.
   static InstMIPS32Br *create(Cfg *Func, CfgNode *TargetTrue,
                               CfgNode *TargetFalse, Operand *Src0,
                               Operand *Src1, CondMIPS32::Cond Cond) {
     constexpr InstMIPS32Label *NoLabel = nullptr;
     return new (Func->allocate<InstMIPS32Br>())
         InstMIPS32Br(Func, TargetTrue, TargetFalse, Src0, Src1, NoLabel, Cond);
   }
 
   static InstMIPS32Br *create(Cfg *Func, CfgNode *TargetTrue,
@@ skipping 108 matching lines @@
 private:
   InstMIPS32FPCmp(Cfg *Func, Variable *Src0, Variable *Src1)
       : InstMIPS32(Func, K, 2, nullptr) {
     addSource(Src0);
     addSource(Src1);
   };
 
   static const char *Opcode;
 };
 
+class InstMIPS32Sync : public InstMIPS32 {
+  InstMIPS32Sync() = delete;
+  InstMIPS32Sync(const InstMIPS32Sync &) = delete;
+  InstMIPS32Sync &operator=(const InstMIPS32Sync &) = delete;
+
+public:
+  static InstMIPS32Sync *create(Cfg *Func) {
+    return new (Func->allocate<InstMIPS32Sync>()) InstMIPS32Sync(Func);
+  }
+
+  void emit(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrEmit();
+    Str << "\t" << Opcode << "\t";
+  }
+
+  void dump(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Func->getContext()->getStrDump() << "sync\t";
+  }
+
+  static bool classof(const Inst *Inst) {
+    return isClassof(Inst, InstMIPS32::Sync);
+  }
+
+  void emitIAS(const Cfg *Func) const override;
+
+private:
+  InstMIPS32Sync(Cfg *Func) : InstMIPS32(Func, InstMIPS32::Sync, 0, nullptr) {}
+  const char *Opcode = "sync";

[Jim Stichnoth, 2016/11/17 05:35:39]

Opcode is usually a static const char* (which you then have to separately define
in the .cpp file).

[sagar.thakur, 2016/11/17 10:57:28]

Done.

+};
+
 // Trap
 template <InstMIPS32::InstKindMIPS32 K>
 class InstMIPS32Trap : public InstMIPS32 {
   InstMIPS32Trap() = delete;
   InstMIPS32Trap(const InstMIPS32Trap &) = delete;
   InstMIPS32Trap &operator=(const InstMIPS32Trap &) = delete;
 
 public:
   static InstMIPS32Trap *create(Cfg *Func, Operand *Src0, Operand *Src1,
                                 uint32_t Tcode) {
@@ skipping 234 matching lines @@
 using InstMIPS32Cvt_d_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_w>;
 using InstMIPS32Cvt_s_d = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_d>;
 using InstMIPS32Cvt_s_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_l>;
 using InstMIPS32Cvt_s_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_w>;
 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>;
 using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>;
 using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>;
 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>;
 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
 using InstMIPS32Ldc1 = InstMIPS32Load<InstMIPS32::Ldc1>;
+using InstMIPS32Ll = InstMIPS32Load<InstMIPS32::Ll>;
 using InstMIPS32Lui = InstMIPS32UnaryopGPR<InstMIPS32::Lui>;
 using InstMIPS32Lw = InstMIPS32Load<InstMIPS32::Lw>;
 using InstMIPS32Lwc1 = InstMIPS32Load<InstMIPS32::Lwc1>;
 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>;
 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>;
 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>;
 using InstMIPS32Movf = InstMIPS32MovConditional<InstMIPS32::Movf>;
 using InstMIPS32Movn = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn>;
 using InstMIPS32Movn_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn_d>;
 using InstMIPS32Movn_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn_s>;
 using InstMIPS32Movt = InstMIPS32MovConditional<InstMIPS32::Movt>;
 using InstMIPS32Movz = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz>;
 using InstMIPS32Movz_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_d>;
 using InstMIPS32Movz_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_s>;
 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>;
 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>;
 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>;
 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>;
 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
 using InstMIPS32Nor = InstMIPS32ThreeAddrGPR<InstMIPS32::Nor>;
 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>;
 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
+using InstMIPS32Sc = InstMIPS32Store<InstMIPS32::Sc>;
 using InstMIPS32Sdc1 = InstMIPS32Store<InstMIPS32::Sdc1>;
 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>;
 using InstMIPS32Sllv = InstMIPS32ThreeAddrGPR<InstMIPS32::Sllv>;
 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>;
 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>;
 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>;
 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>;
 using InstMIPS32Sqrt_d = InstMIPS32TwoAddrFPR<InstMIPS32::Sqrt_d>;
 using InstMIPS32Sqrt_s = InstMIPS32TwoAddrFPR<InstMIPS32::Sqrt_s>;
 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>;
@@ skipping 143 matching lines @@
 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const;
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const;
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H