[Subzero][MIPS] Implements atomic intrinsics for MIPS32

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 79 matching lines @@
 template <> const char *InstMIPS32Cvt_d_w::Opcode = "cvt.d.w";
 template <> const char *InstMIPS32Cvt_s_d::Opcode = "cvt.s.d";
 template <> const char *InstMIPS32Cvt_s_l::Opcode = "cvt.s.l";
 template <> const char *InstMIPS32Cvt_s_w::Opcode = "cvt.s.w";
 template <> const char *InstMIPS32Div::Opcode = "div";
 template <> const char *InstMIPS32Div_d::Opcode = "div.d";
 template <> const char *InstMIPS32Div_s::Opcode = "div.s";
 template <> const char *InstMIPS32Divu::Opcode = "divu";
 template <> const char *InstMIPS32La::Opcode = "la";
 template <> const char *InstMIPS32Ldc1::Opcode = "ldc1";
+template <> const char *InstMIPS32Ll::Opcode = "ll";
 template <> const char *InstMIPS32Lui::Opcode = "lui";
 template <> const char *InstMIPS32Lw::Opcode = "lw";
 template <> const char *InstMIPS32Lwc1::Opcode = "lwc1";
 template <> const char *InstMIPS32Mfc1::Opcode = "mfc1";
 template <> const char *InstMIPS32Mfhi::Opcode = "mfhi";
 template <> const char *InstMIPS32Mflo::Opcode = "mflo";
 template <> const char *InstMIPS32Mov_d::Opcode = "mov.d";
 template <> const char *InstMIPS32Mov_s::Opcode = "mov.s";
 template <> const char *InstMIPS32Movf::Opcode = "movf";
 template <> const char *InstMIPS32Movn::Opcode = "movn";
 template <> const char *InstMIPS32Movn_d::Opcode = "movn.d";
 template <> const char *InstMIPS32Movn_s::Opcode = "movn.s";
 template <> const char *InstMIPS32Movt::Opcode = "movt";
 template <> const char *InstMIPS32Movz::Opcode = "movz";
 template <> const char *InstMIPS32Movz_d::Opcode = "movz.d";
 template <> const char *InstMIPS32Movz_s::Opcode = "movz.s";
 template <> const char *InstMIPS32Mtc1::Opcode = "mtc1";
 template <> const char *InstMIPS32Mthi::Opcode = "mthi";
 template <> const char *InstMIPS32Mtlo::Opcode = "mtlo";
 template <> const char *InstMIPS32Mul::Opcode = "mul";
 template <> const char *InstMIPS32Mul_d::Opcode = "mul.d";
 template <> const char *InstMIPS32Mul_s::Opcode = "mul.s";
 template <> const char *InstMIPS32Mult::Opcode = "mult";
 template <> const char *InstMIPS32Multu::Opcode = "multu";
 template <> const char *InstMIPS32Nor::Opcode = "nor";
 template <> const char *InstMIPS32Or::Opcode = "or";
 template <> const char *InstMIPS32Ori::Opcode = "ori";
+template <> const char *InstMIPS32Sc::Opcode = "sc";
 template <> const char *InstMIPS32Sdc1::Opcode = "sdc1";
 template <> const char *InstMIPS32Sll::Opcode = "sll";
 template <> const char *InstMIPS32Sllv::Opcode = "sllv";
 template <> const char *InstMIPS32Slt::Opcode = "slt";
 template <> const char *InstMIPS32Slti::Opcode = "slti";
 template <> const char *InstMIPS32Sltiu::Opcode = "sltiu";
 template <> const char *InstMIPS32Sltu::Opcode = "sltu";
 template <> const char *InstMIPS32Sqrt_d::Opcode = "sqrt.d";
 template <> const char *InstMIPS32Sqrt_s::Opcode = "sqrt.s";
 template <> const char *InstMIPS32Sra::Opcode = "sra";
@@ skipping 285 matching lines @@
   Str << "\t"
          "jr"
          "\t";
   RA->emit(Func);
 }
 
 void InstMIPS32Br::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   if (Label != nullptr) {
     // Intra-block branches are of kind bcc
-    Asm->bcc(Predicate, getSrc(0), getSrc(1),
-             Asm->getOrCreateLocalLabel(Label->getNumber()));
+    if (isUnconditionalBranch()) {
+      Asm->b(Asm->getOrCreateLocalLabel(Label->getNumber()));
+    } else {
+      Asm->bcc(Predicate, getSrc(0), getSrc(1),
+               Asm->getOrCreateLocalLabel(Label->getNumber()));
+    }
   } else if (isUnconditionalBranch()) {
     Asm->b(Asm->getOrCreateCfgNodeLabel(getTargetFalse()->getIndex()));
   } else {
     switch (Predicate) {
     default:
       break;
     case CondMIPS32::EQ:
     case CondMIPS32::NE:
       Asm->bcc(Predicate, getSrc(0), getSrc(1),
                Asm->getOrCreateCfgNodeLabel(getTargetFalse()->getIndex()));
@@ skipping 14 matching lines @@
   }
 }
 
 void InstMIPS32Br::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\t"
          "b" << InstMIPS32CondAttributes[Predicate].EmitString << "\t";
   if (Label != nullptr) {
-    getSrc(0)->emit(Func);
-    Str << ", ";
-    getSrc(1)->emit(Func);
-    Str << ", " << Label->getLabelName();
+    if (isUnconditionalBranch()) {
+      Str << Label->getLabelName();
+    } else {
+      getSrc(0)->emit(Func);
+      Str << ", ";
+      getSrc(1)->emit(Func);
+      Str << ", " << Label->getLabelName();
+    }
   } else {
     if (isUnconditionalBranch()) {
       Str << getTargetFalse()->getAsmName();
     } else {
       switch (Predicate) {
       default:
         break;
       case CondMIPS32::EQ:
       case CondMIPS32::NE: {
         getSrc(0)->emit(Func);
@@ skipping 24 matching lines @@
 }
 
 void InstMIPS32Br::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "\t"
          "b" << InstMIPS32CondAttributes[Predicate].EmitString << "\t";
 
   if (Label != nullptr) {
-    getSrc(0)->dump(Func);
-    Str << ", ";
-    getSrc(1)->dump(Func);
-    Str << ", " << Label->getLabelName();
+    if (isUnconditionalBranch()) {
+      Str << Label->getLabelName();
+    } else {
+      getSrc(0)->dump(Func);
+      Str << ", ";
+      getSrc(1)->dump(Func);
+      Str << ", " << Label->getLabelName();
+    }
   } else {
     if (isUnconditionalBranch()) {
       Str << getTargetFalse()->getAsmName();
     } else {
       dumpSources(Func);
       Str << ", ";
       Str << getTargetFalse()->getAsmName();
       if (getTargetTrue()) {
         Str << "\n\t"
             << "b"
@@ skipping 349 matching lines @@
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->lui(getDest(), getSrc(0), Reloc);
 }
 
 template <> void InstMIPS32Ldc1::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
   Asm->ldc1(getDest(), Mem->getBase(), Mem->getOffset(), Reloc);
 }
 
+template <> void InstMIPS32Ll::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
+  ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
+  uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
+  Asm->ll(getDest(), Mem->getBase(), Imm);
+}
+
 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
   ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
   uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
   Asm->lw(getDest(), Mem->getBase(), Imm);
 }
 
 template <> void InstMIPS32Lwc1::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
@@ skipping 161 matching lines @@
 template <> void InstMIPS32Or::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->or_(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Ori::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->ori(getDest(), getSrc(0), Imm);
 }
 
+template <> void InstMIPS32Sc::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(1));
+  ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
+  uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
+  Asm->sc(getSrc(0), Mem->getBase(), Imm);
+}
+
 template <> void InstMIPS32Sll::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->sll(getDest(), getSrc(0), Imm);
 }
 
 template <> void InstMIPS32Sllv::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->sllv(getDest(), getSrc(0), getSrc(1));
 }
 
@@ skipping 75 matching lines @@
   uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
   Asm->sw(getSrc(0), Mem->getBase(), Imm);
 }
 
 template <> void InstMIPS32Swc1::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
   Asm->swc1(getSrc(0), Mem->getBase(), Mem->getOffset(), Reloc);
 }
 
+void InstMIPS32Sync::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  Asm->sync();
+}
+
 template <> void InstMIPS32Teq::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->teq(getSrc(0), getSrc(1), getTrapCode());
 }
 
 template <> void InstMIPS32Trunc_l_d::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->trunc_l_d(getDest(), getSrc(0));
 }
 
@@ skipping 17 matching lines @@
   Asm->xor_(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->xori(getDest(), getSrc(0), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice