Reland of "MIPS: Optimize load/store with large offset"

Reland of "MIPS: Optimize load/store with large offset"

Currently, we are using the following sequence for load/store
with large offset (offset > 16b):
    lui at, 0x1234
    ori at, at, 0x5678
    add at, s0, at
    lw a0, 0(at)

This sequence can be optimized in the following way:
    lui at, 0x1234
    add at, s0, at
    lw a0, 0x5678(at)

BUG=

Committed: https://crrev.com/961a45da69b613b819dbadf0c83b2b4ab820c68c
Cr-Commit-Position: refs/heads/master@{#40988}

[dusan.simicic, 2016-11-14 15:02:51]

dusan.simicic@imgtec.com changed reviewers:
+ ivica.bogosavljevic@imgtec.com, marija.antic@imgtec.com,
miran.karic@imgtec.com, v8-mips-ports@googlegroups.com

[dusan.simicic, 2016-11-14 15:02:51]

PTAL

[ivica.bogosavljevic, 2016-11-15 08:52:42]

lgtm with nits:

Change the title and description of the patch to:

Reland of "MIPS: Optimize load/store with large offset"

[dusan.simicic, 2016-11-15 09:23:42]

Description was changed from

==========
MIPS: Optimize load/store with large offset

Currently, we are using the following sequence for load/store
with large offset (offset > 16b):
    lui at, 0x1234
    ori at, at, 0x5678
    add at, s0, at
    lw a0, 0(at)

This sequence can be optimized in the following way:
    lui at, 0x1234
    add at, s0, at
    lw a0, 0x5678(at)

BUG=
==========

to

==========
Reland of "MIPS: Optimize load/store with large offset"

Currently, we are using the following sequence for load/store
with large offset (offset > 16b):
    lui at, 0x1234
    ori at, at, 0x5678
    add at, s0, at
    lw a0, 0(at)

This sequence can be optimized in the following way:
    lui at, 0x1234
    add at, s0, at
    lw a0, 0x5678(at)

BUG=
==========

[dusan.simicic, 2016-11-15 09:51:29]

The CQ bit was checked by dusan.simicic@imgtec.com to run a CQ dry run

[commit-bot: I haz the power, 2016-11-15 09:51:37]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-11-15 10:10:07]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-11-15 10:10:07]

Dry run: This issue passed the CQ dry run.

[dusan.simicic, 2016-11-15 11:58:02]

The CQ bit was unchecked by dusan.simicic@imgtec.com

[dusan.simicic, 2016-11-15 11:58:09]

The CQ bit was checked by dusan.simicic@imgtec.com

[dusan.simicic, 2016-11-15 11:58:10]

The patchset sent to the CQ was uploaded after l-g-t-m from
ivica.bogosavljevic@imgtec.com
Link to the patchset: https://codereview.chromium.org/2503493002/#ps40001
(title: "Reland of "MIPS: Optimize load/store with large offset"")

[commit-bot: I haz the power, 2016-11-15 11:58:18]

CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-11-15 12:00:36]

Description was changed from

==========
Reland of "MIPS: Optimize load/store with large offset"

Currently, we are using the following sequence for load/store
with large offset (offset > 16b):
    lui at, 0x1234
    ori at, at, 0x5678
    add at, s0, at
    lw a0, 0(at)

This sequence can be optimized in the following way:
    lui at, 0x1234
    add at, s0, at
    lw a0, 0x5678(at)

BUG=
==========

to

==========
Reland of "MIPS: Optimize load/store with large offset"

Currently, we are using the following sequence for load/store
with large offset (offset > 16b):
    lui at, 0x1234
    ori at, at, 0x5678
    add at, s0, at
    lw a0, 0(at)

This sequence can be optimized in the following way:
    lui at, 0x1234
    add at, s0, at
    lw a0, 0x5678(at)

BUG=
==========

[commit-bot: I haz the power, 2016-11-15 12:00:36]

Committed patchset #3 (id:40001)

[commit-bot: I haz the power, 2016-11-17 22:33:50]

Description was changed from

==========
Reland of "MIPS: Optimize load/store with large offset"

Currently, we are using the following sequence for load/store
with large offset (offset > 16b):
    lui at, 0x1234
    ori at, at, 0x5678
    add at, s0, at
    lw a0, 0(at)

This sequence can be optimized in the following way:
    lui at, 0x1234
    add at, s0, at
    lw a0, 0x5678(at)

BUG=
==========

to

==========
Reland of "MIPS: Optimize load/store with large offset"

Currently, we are using the following sequence for load/store
with large offset (offset > 16b):
    lui at, 0x1234
    ori at, at, 0x5678
    add at, s0, at
    lw a0, 0(at)

This sequence can be optimized in the following way:
    lui at, 0x1234
    add at, s0, at
    lw a0, 0x5678(at)

BUG=

Committed: https://crrev.com/961a45da69b613b819dbadf0c83b2b4ab820c68c
Cr-Commit-Position: refs/heads/master@{#40988}
==========

[commit-bot: I haz the power, 2016-11-17 22:33:51]

Patchset 3 (id:??) landed as
https://crrev.com/961a45da69b613b819dbadf0c83b2b4ab820c68c
Cr-Commit-Position: refs/heads/master@{#40988}