Index: src/compiler/mips/instruction-selector-mips.cc |
diff --git a/src/compiler/mips/instruction-selector-mips.cc b/src/compiler/mips/instruction-selector-mips.cc |
index ce2d4ea42e35a8907d03b117a2238941f1a951cb..d26b8a28c4bb880d7ecb52cb4a3d958baad10979 100644 |
--- a/src/compiler/mips/instruction-selector-mips.cc |
+++ b/src/compiler/mips/instruction-selector-mips.cc |
@@ -46,33 +46,12 @@ |
case kMipsSub: |
case kMipsXor: |
return is_uint16(value); |
- case kMipsLb: |
- case kMipsLbu: |
- case kMipsSb: |
- case kMipsLh: |
- case kMipsLhu: |
- case kMipsSh: |
- case kMipsLw: |
- case kMipsSw: |
- case kMipsLwc1: |
- case kMipsSwc1: |
case kMipsLdc1: |
case kMipsSdc1: |
- case kCheckedLoadInt8: |
- case kCheckedLoadUint8: |
- case kCheckedLoadInt16: |
- case kCheckedLoadUint16: |
- case kCheckedLoadWord32: |
- case kCheckedStoreWord8: |
- case kCheckedStoreWord16: |
- case kCheckedStoreWord32: |
- case kCheckedLoadFloat32: |
case kCheckedLoadFloat64: |
- case kCheckedStoreFloat32: |
case kCheckedStoreFloat64: |
- // true even for 32b values, offsets > 16b |
- // are handled in assembler-mips.cc |
- return is_int32(value); |
+ return std::numeric_limits<int16_t>::min() <= (value + kIntSize) && |
+ std::numeric_limits<int16_t>::max() >= (value + kIntSize); |
default: |
return is_int16(value); |
} |
@@ -1786,7 +1765,6 @@ |
UNREACHABLE(); |
return; |
} |
- |
if (g.CanBeImmediate(index, opcode)) { |
Emit(opcode | AddressingModeField::encode(kMode_MRI), |
g.DefineAsRegister(node), g.UseRegister(base), g.UseImmediate(index)); |