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Side by Side Diff: gpu/ipc/service/gpu_channel.cc

Issue 2493623002: Remove IPC::Endpoint. (Closed)
Patch Set: Created 4 years, 1 month ago
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1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "gpu/ipc/service/gpu_channel.h" 5 #include "gpu/ipc/service/gpu_channel.h"
6 6
7 #include <utility> 7 #include <utility>
8 8
9 #if defined(OS_WIN) 9 #if defined(OS_WIN)
10 #include <windows.h> 10 #include <windows.h>
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636 636
637 void GpuChannel::SetUnhandledMessageListener(IPC::Listener* listener) { 637 void GpuChannel::SetUnhandledMessageListener(IPC::Listener* listener) {
638 unhandled_message_listener_ = listener; 638 unhandled_message_listener_ = listener;
639 } 639 }
640 640
641 base::WeakPtr<GpuChannel> GpuChannel::AsWeakPtr() { 641 base::WeakPtr<GpuChannel> GpuChannel::AsWeakPtr() {
642 return weak_factory_.GetWeakPtr(); 642 return weak_factory_.GetWeakPtr();
643 } 643 }
644 644
645 base::ProcessId GpuChannel::GetClientPID() const { 645 base::ProcessId GpuChannel::GetClientPID() const {
646 return channel_->GetPeerPID(); 646 DCHECK_NE(peer_pid_, base::kNullProcessId);
647 return peer_pid_;
647 } 648 }
648 649
649 uint32_t GpuChannel::GetProcessedOrderNum() const { 650 uint32_t GpuChannel::GetProcessedOrderNum() const {
650 uint32_t processed_order_num = 0; 651 uint32_t processed_order_num = 0;
651 for (auto& kv : streams_) { 652 for (auto& kv : streams_) {
652 processed_order_num = 653 processed_order_num =
653 std::max(processed_order_num, kv.second->GetProcessedOrderNum()); 654 std::max(processed_order_num, kv.second->GetProcessedOrderNum());
654 } 655 }
655 return processed_order_num; 656 return processed_order_num;
656 } 657 }
657 658
658 uint32_t GpuChannel::GetUnprocessedOrderNum() const { 659 uint32_t GpuChannel::GetUnprocessedOrderNum() const {
659 uint32_t unprocessed_order_num = 0; 660 uint32_t unprocessed_order_num = 0;
660 for (auto& kv : streams_) { 661 for (auto& kv : streams_) {
661 unprocessed_order_num = 662 unprocessed_order_num =
662 std::max(unprocessed_order_num, kv.second->GetUnprocessedOrderNum()); 663 std::max(unprocessed_order_num, kv.second->GetUnprocessedOrderNum());
663 } 664 }
664 return unprocessed_order_num; 665 return unprocessed_order_num;
665 } 666 }
666 667
667 bool GpuChannel::OnMessageReceived(const IPC::Message& msg) { 668 bool GpuChannel::OnMessageReceived(const IPC::Message& msg) {
668 // All messages should be pushed to channel_messages_ and handled separately. 669 // All messages should be pushed to channel_messages_ and handled separately.
669 NOTREACHED(); 670 NOTREACHED();
670 return false; 671 return false;
671 } 672 }
672 673
674 void GpuChannel::OnChannelConnected(int32_t peer_pid) {
675 peer_pid_ = peer_pid;
676 }
677
673 void GpuChannel::OnChannelError() { 678 void GpuChannel::OnChannelError() {
674 gpu_channel_manager_->RemoveChannel(client_id_); 679 gpu_channel_manager_->RemoveChannel(client_id_);
675 } 680 }
676 681
677 bool GpuChannel::Send(IPC::Message* message) { 682 bool GpuChannel::Send(IPC::Message* message) {
678 // The GPU process must never send a synchronous IPC message to the renderer 683 // The GPU process must never send a synchronous IPC message to the renderer
679 // process. This could result in deadlock. 684 // process. This could result in deadlock.
680 DCHECK(!message->is_sync()); 685 DCHECK(!message->is_sync());
681 686
682 DVLOG(1) << "sending message @" << message << " on channel @" << this 687 DVLOG(1) << "sending message @" << message << " on channel @" << this
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1053 1058
1054 return manager->gpu_memory_buffer_factory() 1059 return manager->gpu_memory_buffer_factory()
1055 ->AsImageFactory() 1060 ->AsImageFactory()
1056 ->CreateImageForGpuMemoryBuffer(handle, size, format, internalformat, 1061 ->CreateImageForGpuMemoryBuffer(handle, size, format, internalformat,
1057 client_id_, surface_handle); 1062 client_id_, surface_handle);
1058 } 1063 }
1059 } 1064 }
1060 } 1065 }
1061 1066
1062 } // namespace gpu 1067 } // namespace gpu
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