clang-format runtime/vm

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
 #include "vm/dart_entry.h"
 #include "vm/flow_graph_compiler.h"
 #include "vm/heap.h"
 #include "vm/instructions.h"
 #include "vm/object_store.h"
 #include "vm/stack_frame.h"
 #include "vm/stub_code.h"
 #include "vm/tags.h"
 
 #define __ assembler->
 
 namespace dart {
 
 DEFINE_FLAG(bool, inline_alloc, true, "Inline allocation of objects.");
-DEFINE_FLAG(bool, use_slow_path, false,
-    "Set to true for debugging & verifying the slow paths.");
+DEFINE_FLAG(bool,
+            use_slow_path,
+            false,
+            "Set to true for debugging & verifying the slow paths.");
 DECLARE_FLAG(bool, trace_optimized_ic_calls);
 
 // Input parameters:
 //   RA : return address.
 //   SP : address of last argument in argument array.
 //   SP + 4*S4 - 4 : address of first argument in argument array.
 //   SP + 4*S4 : address of return value.
 //   S5 : address of the runtime function to call.
 //   S4 : number of arguments to the call.
 void StubCode::GenerateCallToRuntimeStub(Assembler* assembler) {
   const intptr_t thread_offset = NativeArguments::thread_offset();
   const intptr_t argc_tag_offset = NativeArguments::argc_tag_offset();
   const intptr_t argv_offset = NativeArguments::argv_offset();
   const intptr_t retval_offset = NativeArguments::retval_offset();
 
   __ SetPrologueOffset();
   __ Comment("CallToRuntimeStub");
   __ EnterStubFrame();
 
   // Save exit frame information to enable stack walking as we are about
   // to transition to Dart VM C++ code.
   __ sw(FP, Address(THR, Thread::top_exit_frame_info_offset()));
 
 #if defined(DEBUG)
-  { Label ok;
+  {
+    Label ok;
     // Check that we are always entering from Dart code.
     __ lw(T0, Assembler::VMTagAddress());
     __ BranchEqual(T0, Immediate(VMTag::kDartTagId), &ok);
     __ Stop("Not coming from Dart code.");
     __ Bind(&ok);
   }
 #endif
 
   // Mark that the thread is executing VM code.
   __ sw(S5, Assembler::VMTagAddress());
@@ skipping 21 matching lines @@
   // Set argv in NativeArguments.
   __ addiu(A2, A2, Immediate(kParamEndSlotFromFp * kWordSize));
 
 
   // Call runtime or redirection via simulator.
   // We defensively always jalr through T9 because it is sometimes required by
   // the MIPS ABI.
   __ mov(T9, S5);
   __ jalr(T9);
 
-    ASSERT(retval_offset == 3 * kWordSize);
+  ASSERT(retval_offset == 3 * kWordSize);
   // Retval is next to 1st argument.
   __ delay_slot()->addiu(A3, A2, Immediate(kWordSize));
   __ Comment("CallToRuntimeStub return");
 
   // Mark that the thread is executing Dart code.
   __ LoadImmediate(A2, VMTag::kDartTagId);
   __ sw(A2, Assembler::VMTagAddress());
 
   // Reset exit frame information in Isolate structure.
   __ sw(ZR, Address(THR, Thread::top_exit_frame_info_offset()));
@@ skipping 35 matching lines @@
 
   __ SetPrologueOffset();
   __ Comment("CallNativeCFunctionStub");
   __ EnterStubFrame();
 
   // Save exit frame information to enable stack walking as we are about
   // to transition to native code.
   __ sw(FP, Address(THR, Thread::top_exit_frame_info_offset()));
 
 #if defined(DEBUG)
-  { Label ok;
+  {
+    Label ok;
     // Check that we are always entering from Dart code.
     __ lw(T0, Assembler::VMTagAddress());
     __ BranchEqual(T0, Immediate(VMTag::kDartTagId), &ok);
     __ Stop("Not coming from Dart code.");
     __ Bind(&ok);
   }
 #endif
 
   // Mark that the thread is executing native code.
   __ sw(T5, Assembler::VMTagAddress());
@@ skipping 21 matching lines @@
   // Dart API for native functions.
   // For now, space is reserved on the stack and we pass a pointer to it.
   __ addiu(SP, SP, Immediate(-4 * kWordSize));
   __ sw(A3, Address(SP, 3 * kWordSize));
   __ sw(A2, Address(SP, 2 * kWordSize));
   __ sw(A1, Address(SP, 1 * kWordSize));
   __ sw(A0, Address(SP, 0 * kWordSize));
   __ mov(A0, SP);  // Pass the pointer to the NativeArguments.
 
 
-  __ mov(A1, T5);  // Pass the function entrypoint.
+  __ mov(A1, T5);                              // Pass the function entrypoint.
   __ ReserveAlignedFrameSpace(2 * kWordSize);  // Just passing A0, A1.
 
   // Call native wrapper function or redirection via simulator.
   __ lw(T9, Address(THR, Thread::native_call_wrapper_entry_point_offset()));
   __ jalr(T9);
   __ Comment("CallNativeCFunctionStub return");
 
   // Mark that the thread is executing Dart code.
   __ LoadImmediate(A2, VMTag::kDartTagId);
   __ sw(A2, Assembler::VMTagAddress());
@@ skipping 19 matching lines @@
 
   __ SetPrologueOffset();
   __ Comment("CallNativeCFunctionStub");
   __ EnterStubFrame();
 
   // Save exit frame information to enable stack walking as we are about
   // to transition to native code.
   __ sw(FP, Address(THR, Thread::top_exit_frame_info_offset()));
 
 #if defined(DEBUG)
-  { Label ok;
+  {
+    Label ok;
     // Check that we are always entering from Dart code.
     __ lw(T0, Assembler::VMTagAddress());
     __ BranchEqual(T0, Immediate(VMTag::kDartTagId), &ok);
     __ Stop("Not coming from Dart code.");
     __ Bind(&ok);
   }
 #endif
 
   // Mark that the thread is executing native code.
   __ sw(T5, Assembler::VMTagAddress());
@@ skipping 224 matching lines @@
     }
   }
   for (int i = 0; i < kNumberOfFRegisters; i++) {
     // These go below the CPU registers.
     const int slot = kNumberOfCpuRegisters + kNumberOfFRegisters - i;
     FRegister reg = static_cast<FRegister>(i);
     __ swc1(reg, Address(SP, kPushedRegistersSize - slot * kWordSize));
   }
 
   __ mov(A0, SP);  // Pass address of saved registers block.
-  bool is_lazy = (kind == kLazyDeoptFromReturn) ||
-                 (kind == kLazyDeoptFromThrow);
+  bool is_lazy =
+      (kind == kLazyDeoptFromReturn) || (kind == kLazyDeoptFromThrow);
   __ LoadImmediate(A1, is_lazy ? 1 : 0);
   __ ReserveAlignedFrameSpace(1 * kWordSize);
   __ CallRuntime(kDeoptimizeCopyFrameRuntimeEntry, 2);
   // Result (V0) is stack-size (FP - SP) in bytes, incl. the return address.
 
   if (kind == kLazyDeoptFromReturn) {
     // Restore result into T1 temporarily.
     __ lw(T1, Address(FP, saved_result_slot_from_fp * kWordSize));
   } else if (kind == kLazyDeoptFromThrow) {
     // Restore result into T1 temporarily.
@@ skipping 208 matching lines @@
   __ LoadImmediate(T3, ~(kObjectAlignment - 1));
   __ and_(T2, T2, T3);
 
   // T2: Allocation size.
 
   Heap::Space space = Heap::kNew;
   __ lw(T3, Address(THR, Thread::heap_offset()));
   // Potential new object start.
   __ lw(T0, Address(T3, Heap::TopOffset(space)));
 
-  __ addu(T1, T0, T2);  // Potential next object start.
+  __ addu(T1, T0, T2);                        // Potential next object start.
   __ BranchUnsignedLess(T1, T0, &slow_case);  // Branch on unsigned overflow.
 
   // Check if the allocation fits into the remaining space.
   // T0: potential new object start.
   // T1: potential next object start.
   // T2: allocation size.
   // T3: heap.
   __ lw(T4, Address(T3, Heap::EndOffset(space)));
   __ BranchUnsignedGreaterEqual(T1, T4, &slow_case);
 
   // Successfully allocated the object(s), now update top to point to
   // next object start and initialize the object.
   // T3: heap.
   __ sw(T1, Address(T3, Heap::TopOffset(space)));
   __ addiu(T0, T0, Immediate(kHeapObjectTag));
   NOT_IN_PRODUCT(__ UpdateAllocationStatsWithSize(cid, T2, T4, space));
 
   // Initialize the tags.
   // T0: new object start as a tagged pointer.
   // T1: new object end address.
   // T2: allocation size.
   {
     Label overflow, done;
     const intptr_t shift = RawObject::kSizeTagPos - kObjectAlignmentLog2;
 
-    __ BranchUnsignedGreater(
-        T2, Immediate(RawObject::SizeTag::kMaxSizeTag), &overflow);
+    __ BranchUnsignedGreater(T2, Immediate(RawObject::SizeTag::kMaxSizeTag),
+                             &overflow);
     __ b(&done);
     __ delay_slot()->sll(T2, T2, shift);
     __ Bind(&overflow);
     __ mov(T2, ZR);
     __ Bind(&done);
 
     // Get the class index and insert it into the tags.
     // T2: size and bit tags.
     __ LoadImmediate(TMP, RawObject::ClassIdTag::encode(cid));
     __ or_(T2, T2, TMP);
     __ sw(T2, FieldAddress(T0, Array::tags_offset()));  // Store tags.
   }
 
   // T0: new object start as a tagged pointer.
   // T1: new object end address.
   // Store the type argument field.
-  __ StoreIntoObjectNoBarrier(T0,
-                              FieldAddress(T0, Array::type_arguments_offset()),
-                              A0);
+  __ StoreIntoObjectNoBarrier(
+      T0, FieldAddress(T0, Array::type_arguments_offset()), A0);
 
   // Set the length field.
-  __ StoreIntoObjectNoBarrier(T0,
-                              FieldAddress(T0, Array::length_offset()),
-                              A1);
+  __ StoreIntoObjectNoBarrier(T0, FieldAddress(T0, Array::length_offset()), A1);
 
   __ LoadObject(T7, Object::null_object());
   // Initialize all array elements to raw_null.
   // T0: new object start as a tagged pointer.
   // T1: new object end address.
   // T2: iterator which initially points to the start of the variable
   // data area to be initialized.
   // T7: null.
   __ AddImmediate(T2, T0, sizeof(RawArray) - kHeapObjectTag);
 
@@ skipping 47 matching lines @@
 
   // Push code object to PC marker slot.
   __ lw(TMP, Address(A3, Thread::invoke_dart_code_stub_offset()));
   __ Push(TMP);
 
   // Save new context and C++ ABI callee-saved registers.
 
   // The saved vm tag, top resource, and top exit frame info.
   const intptr_t kPreservedSlots = 3;
   const intptr_t kPreservedRegSpace =
-      kWordSize * (kAbiPreservedCpuRegCount + kAbiPreservedFpuRegCount +
-                   kPreservedSlots);
+      kWordSize *
+      (kAbiPreservedCpuRegCount + kAbiPreservedFpuRegCount + kPreservedSlots);
 
   __ addiu(SP, SP, Immediate(-kPreservedRegSpace));
   for (int i = S0; i <= S7; i++) {
     Register r = static_cast<Register>(i);
     const intptr_t slot = i - S0 + kPreservedSlots;
     __ sw(r, Address(SP, slot * kWordSize));
   }
 
-  for (intptr_t i = kAbiFirstPreservedFpuReg;
-       i <= kAbiLastPreservedFpuReg; i++) {
+  for (intptr_t i = kAbiFirstPreservedFpuReg; i <= kAbiLastPreservedFpuReg;
+       i++) {
     FRegister r = static_cast<FRegister>(i);
-    const intptr_t slot =
-        kAbiPreservedCpuRegCount + kPreservedSlots + i -
-        kAbiFirstPreservedFpuReg;
+    const intptr_t slot = kAbiPreservedCpuRegCount + kPreservedSlots + i -
+                          kAbiFirstPreservedFpuReg;
     __ swc1(r, Address(SP, slot * kWordSize));
   }
 
   // We now load the pool pointer(PP) with a GC safe value as we are about
   // to invoke dart code.
   __ LoadImmediate(PP, 0);
 
   // Set up THR, which caches the current thread in Dart code.
   if (THR != A3) {
     __ mov(THR, A3);
@@ skipping 70 matching lines @@
   __ lw(T0, Address(SP, 0 * kWordSize));
   __ sw(T0, Address(THR, Thread::top_exit_frame_info_offset()));
 
   // Restore C++ ABI callee-saved registers.
   for (int i = S0; i <= S7; i++) {
     Register r = static_cast<Register>(i);
     const intptr_t slot = i - S0 + kPreservedSlots;
     __ lw(r, Address(SP, slot * kWordSize));
   }
 
-  for (intptr_t i = kAbiFirstPreservedFpuReg;
-       i <= kAbiLastPreservedFpuReg; i++) {
+  for (intptr_t i = kAbiFirstPreservedFpuReg; i <= kAbiLastPreservedFpuReg;
+       i++) {
     FRegister r = static_cast<FRegister>(i);
-    const intptr_t slot =
-        kAbiPreservedCpuRegCount + kPreservedSlots + i -
-        kAbiFirstPreservedFpuReg;
+    const intptr_t slot = kAbiPreservedCpuRegCount + kPreservedSlots + i -
+                          kAbiFirstPreservedFpuReg;
     __ lwc1(r, Address(SP, slot * kWordSize));
   }
 
   __ addiu(SP, SP, Immediate(kPreservedRegSpace));
 
   // Restore the frame pointer and return.
   __ LeaveFrameAndReturn();
 }
 
 
 // Called for inline allocation of contexts.
 // Input:
 //   T1: number of context variables.
 // Output:
 //   V0: new allocated RawContext object.
 void StubCode::GenerateAllocateContextStub(Assembler* assembler) {
   __ Comment("AllocateContext");
   if (FLAG_inline_alloc) {
     Label slow_case;
     // First compute the rounded instance size.
     // T1: number of context variables.
     intptr_t fixed_size = sizeof(RawContext) + kObjectAlignment - 1;
     __ LoadImmediate(T2, fixed_size);
     __ sll(T0, T1, 2);
     __ addu(T2, T2, T0);
     ASSERT(kSmiTagShift == 1);
-    __ LoadImmediate(T0, ~((kObjectAlignment) - 1));
+    __ LoadImmediate(T0, ~((kObjectAlignment)-1));
     __ and_(T2, T2, T0);
 
     NOT_IN_PRODUCT(__ MaybeTraceAllocation(kContextCid, T4, &slow_case));
     // Now allocate the object.
     // T1: number of context variables.
     // T2: object size.
     const intptr_t cid = kContextCid;
     Heap::Space space = Heap::kNew;
     __ lw(T5, Address(THR, Thread::heap_offset()));
     __ lw(V0, Address(T5, Heap::TopOffset(space)));
@@ skipping 23 matching lines @@
     __ addiu(V0, V0, Immediate(kHeapObjectTag));
     NOT_IN_PRODUCT(__ UpdateAllocationStatsWithSize(cid, T2, T5, space));
 
     // Calculate the size tag.
     // V0: new object.
     // T1: number of context variables.
     // T2: object size.
     const intptr_t shift = RawObject::kSizeTagPos - kObjectAlignmentLog2;
     __ LoadImmediate(TMP, RawObject::SizeTag::kMaxSizeTag);
     __ sltu(CMPRES1, TMP, T2);  // CMPRES1 = T2 > TMP ? 1 : 0.
-    __ movn(T2, ZR, CMPRES1);  // T2 = CMPRES1 != 0 ? 0 : T2.
-    __ sll(TMP, T2, shift);  // TMP = T2 << shift.
+    __ movn(T2, ZR, CMPRES1);   // T2 = CMPRES1 != 0 ? 0 : T2.
+    __ sll(TMP, T2, shift);     // TMP = T2 << shift.
     __ movz(T2, TMP, CMPRES1);  // T2 = CMPRES1 == 0 ? TMP : T2.
 
     // Get the class index and insert it into the tags.
     // T2: size and bit tags.
     __ LoadImmediate(TMP, RawObject::ClassIdTag::encode(cid));
     __ or_(T2, T2, TMP);
     __ sw(T2, FieldAddress(V0, Context::tags_offset()));
 
     // Setup up number of context variables field.
     // V0: new object.
@@ skipping 27 matching lines @@
   // Create a stub frame as we are pushing some objects on the stack before
   // calling into the runtime.
   __ EnterStubFrame();
   // Setup space on stack for return value.
   __ SmiTag(T1);
   __ addiu(SP, SP, Immediate(-2 * kWordSize));
   __ LoadObject(TMP, Object::null_object());
   __ sw(TMP, Address(SP, 1 * kWordSize));  // Store null.
   __ sw(T1, Address(SP, 0 * kWordSize));
   __ CallRuntime(kAllocateContextRuntimeEntry, 1);  // Allocate context.
-  __ lw(V0, Address(SP, 1 * kWordSize));  // Get the new context.
-  __ addiu(SP, SP, Immediate(2 * kWordSize));  // Pop argument and return.
+  __ lw(V0, Address(SP, 1 * kWordSize));            // Get the new context.
+  __ addiu(SP, SP, Immediate(2 * kWordSize));       // Pop argument and return.
 
   // V0: new object
   // Restore the frame pointer.
   __ LeaveStubFrameAndReturn();
 }
 
 
 // Helper stub to implement Assembler::StoreIntoObject.
 // Input parameters:
 //   T0: Address (i.e. object) being stored into.
@@ skipping 129 matching lines @@
 
     // Initialize the remaining words of the object.
     // T2: new object start.
     // T3: next object start.
     // T1: new object type arguments (if is_cls_parameterized).
     // First try inlining the initialization without a loop.
     if (instance_size < (kInlineInstanceSize * kWordSize)) {
       // Check if the object contains any non-header fields.
       // Small objects are initialized using a consecutive set of writes.
       for (intptr_t current_offset = Instance::NextFieldOffset();
-           current_offset < instance_size;
-           current_offset += kWordSize) {
+           current_offset < instance_size; current_offset += kWordSize) {
         __ sw(T7, Address(T2, current_offset));
       }
     } else {
       __ addiu(T4, T2, Immediate(Instance::NextFieldOffset()));
       // Loop until the whole object is initialized.
       // T2: new object.
       // T3: next object start.
       // T4: next word to be initialized.
       // T1: new object type arguments (if is_cls_parameterized).
       Label loop, loop_exit;
@@ skipping 87 matching lines @@
 // function and not the top-scope function.
 void StubCode::GenerateOptimizedUsageCounterIncrement(Assembler* assembler) {
   __ Comment("OptimizedUsageCounterIncrement");
   Register ic_reg = S5;
   Register func_reg = T0;
   if (FLAG_trace_optimized_ic_calls) {
     __ EnterStubFrame();
     __ addiu(SP, SP, Immediate(-4 * kWordSize));
     __ sw(T0, Address(SP, 3 * kWordSize));
     __ sw(S5, Address(SP, 2 * kWordSize));
-    __ sw(ic_reg, Address(SP, 1 * kWordSize));  // Argument.
+    __ sw(ic_reg, Address(SP, 1 * kWordSize));    // Argument.
     __ sw(func_reg, Address(SP, 0 * kWordSize));  // Argument.
     __ CallRuntime(kTraceICCallRuntimeEntry, 2);
     __ lw(S5, Address(SP, 2 * kWordSize));
     __ lw(T0, Address(SP, 3 * kWordSize));
     __ addiu(SP, SP, Immediate(4 * kWordSize));  // Discard argument;
     __ LeaveStubFrame();
   }
   __ lw(T7, FieldAddress(func_reg, Function::usage_counter_offset()));
   __ addiu(T7, T7, Immediate(1));
   __ sw(T7, FieldAddress(func_reg, Function::usage_counter_offset()));
@@ skipping 27 matching lines @@
                           Label* not_smi_or_overflow) {
   __ Comment("Fast Smi op");
   ASSERT(num_args == 2);
   __ lw(T0, Address(SP, 0 * kWordSize));  // Left.
   __ lw(T1, Address(SP, 1 * kWordSize));  // Right.
   __ or_(CMPRES1, T0, T1);
   __ andi(CMPRES1, CMPRES1, Immediate(kSmiTagMask));
   __ bne(CMPRES1, ZR, not_smi_or_overflow);
   switch (kind) {
     case Token::kADD: {
-     __ AdduDetectOverflow(V0, T1, T0, CMPRES1);  // Add.
-     __ bltz(CMPRES1, not_smi_or_overflow);  // Fall through on overflow.
+      __ AdduDetectOverflow(V0, T1, T0, CMPRES1);  // Add.
+      __ bltz(CMPRES1, not_smi_or_overflow);       // Fall through on overflow.
       break;
     }
     case Token::kSUB: {
       __ SubuDetectOverflow(V0, T1, T0, CMPRES1);  // Subtract.
-      __ bltz(CMPRES1, not_smi_or_overflow);  // Fall through on overflow.
+      __ bltz(CMPRES1, not_smi_or_overflow);       // Fall through on overflow.
       break;
     }
     case Token::kEQ: {
       Label true_label, done;
       __ beq(T1, T0, &true_label);
       __ LoadObject(V0, Bool::False());
       __ b(&done);
       __ Bind(&true_label);
       __ LoadObject(V0, Bool::True());
       __ Bind(&done);
       break;
     }
-    default: UNIMPLEMENTED();
+    default:
+      UNIMPLEMENTED();
   }
   // S5: IC data object (preserved).
   __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
   // T0: ic_data_array with check entries: classes and target functions.
   __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
-  // T0: points directly to the first ic data array element.
+// T0: points directly to the first ic data array element.
 #if defined(DEBUG)
   // Check that first entry is for Smi/Smi.
   Label error, ok;
   const int32_t imm_smi_cid = reinterpret_cast<int32_t>(Smi::New(kSmiCid));
   __ lw(T4, Address(T0));
   __ BranchNotEqual(T4, Immediate(imm_smi_cid), &error);
   __ lw(T4, Address(T0, kWordSize));
   __ BranchEqual(T4, Immediate(imm_smi_cid), &ok);
   __ Bind(&error);
   __ Stop("Incorrect IC data");
@@ skipping 26 matching lines @@
 // - Match not found -> jump to IC miss.
 void StubCode::GenerateNArgsCheckInlineCacheStub(
     Assembler* assembler,
     intptr_t num_args,
     const RuntimeEntry& handle_ic_miss,
     Token::Kind kind,
     bool optimized) {
   __ Comment("NArgsCheckInlineCacheStub");
   ASSERT(num_args > 0);
 #if defined(DEBUG)
-  { Label ok;
+  {
+    Label ok;
     // Check that the IC data array has NumArgsTested() == num_args.
     // 'NumArgsTested' is stored in the least significant bits of 'state_bits'.
     __ lw(T0, FieldAddress(S5, ICData::state_bits_offset()));
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
     __ BranchEqual(T0, Immediate(num_args), &ok);
     __ Stop("Incorrect stub for IC data");
     __ Bind(&ok);
   }
 #endif  // DEBUG
@@ skipping 56 matching lines @@
       // T3: next argument class ID (smi).
       __ lw(T4, Address(T0, i * kWordSize));
       // T4: next class ID to check (smi).
     }
     if (i < (num_args - 1)) {
       __ bne(T3, T4, &update);  // Continue.
     } else {
       // Last check, all checks before matched.
       Label skip;
       __ bne(T3, T4, &skip);
-      __ b(&found);  // Break.
+      __ b(&found);                  // Break.
       __ delay_slot()->mov(RA, T2);  // Restore return address if found.
       __ Bind(&skip);
     }
   }
   __ Bind(&update);
   // Reload receiver class ID.  It has not been destroyed when num_args == 1.
   if (num_args > 1) {
     __ sll(T3, T1, 1);
     __ addu(T3, T3, SP);
     __ lw(T3, Address(T3));
     __ LoadTaggedClassIdMayBeSmi(T3, T3);
   }
 
   const intptr_t entry_size = ICData::TestEntryLengthFor(num_args) * kWordSize;
   __ AddImmediate(T0, entry_size);  // Next entry.
-  __ lw(T4, Address(T0));  // Next class ID.
+  __ lw(T4, Address(T0));           // Next class ID.
 
   __ Bind(&test);
   __ BranchNotEqual(T4, Immediate(Smi::RawValue(kIllegalCid)), &loop);  // Done?
 
   __ Comment("IC miss");
   // Restore return address.
   __ mov(RA, T2);
 
   // Compute address of arguments (first read number of arguments from
   // arguments descriptor array and then compute address on the stack).
@@ skipping 88 matching lines @@
 //  RA: Return address.
 //  S5: Inline cache data object.
 // Inline cache data object structure:
 // 0: function-name
 // 1: N, number of arguments checked.
 // 2 .. (length - 1): group of checks, each check containing:
 //   - N classes.
 //   - 1 target function.
 void StubCode::GenerateOneArgCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
-  GenerateNArgsCheckInlineCacheStub(assembler, 1,
-      kInlineCacheMissHandlerOneArgRuntimeEntry, Token::kILLEGAL);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 1, kInlineCacheMissHandlerOneArgRuntimeEntry, Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateTwoArgsCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
   GenerateNArgsCheckInlineCacheStub(assembler, 2,
-      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kILLEGAL);
+                                    kInlineCacheMissHandlerTwoArgsRuntimeEntry,
+                                    Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateSmiAddInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
-  GenerateNArgsCheckInlineCacheStub(assembler, 2,
-      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kADD);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 2, kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kADD);
 }
 
 
 void StubCode::GenerateSmiSubInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
-  GenerateNArgsCheckInlineCacheStub(assembler, 2,
-      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kSUB);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 2, kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kSUB);
 }
 
 
 void StubCode::GenerateSmiEqualInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
-  GenerateNArgsCheckInlineCacheStub(assembler, 2,
-      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kEQ);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 2, kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kEQ);
 }
 
 
 void StubCode::GenerateOneArgOptimizedCheckInlineCacheStub(
     Assembler* assembler) {
   GenerateOptimizedUsageCounterIncrement(assembler);
   GenerateNArgsCheckInlineCacheStub(assembler, 1,
-      kInlineCacheMissHandlerOneArgRuntimeEntry, Token::kILLEGAL,
-      true /* optimized */);
+                                    kInlineCacheMissHandlerOneArgRuntimeEntry,
+                                    Token::kILLEGAL, true /* optimized */);
 }
 
 
 void StubCode::GenerateTwoArgsOptimizedCheckInlineCacheStub(
     Assembler* assembler) {
   GenerateOptimizedUsageCounterIncrement(assembler);
   GenerateNArgsCheckInlineCacheStub(assembler, 2,
-      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kILLEGAL,
-      true /* optimized */);
+                                    kInlineCacheMissHandlerTwoArgsRuntimeEntry,
+                                    Token::kILLEGAL, true /* optimized */);
 }
 
 
 // Intermediary stub between a static call and its target. ICData contains
 // the target function and the call count.
 // S5: ICData
 void StubCode::GenerateZeroArgsUnoptimizedStaticCallStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
   __ Comment("UnoptimizedStaticCallStub");
 #if defined(DEBUG)
-  { Label ok;
+  {
+    Label ok;
     // Check that the IC data array has NumArgsTested() == 0.
     // 'NumArgsTested' is stored in the least significant bits of 'state_bits'.
     __ lw(T0, FieldAddress(S5, ICData::state_bits_offset()));
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
     __ beq(T0, ZR, &ok);
     __ Stop("Incorrect IC data for unoptimized static call");
     __ Bind(&ok);
   }
 #endif  // DEBUG
@@ skipping 19 matching lines @@
     // Increment count for this call.
     __ lw(T4, Address(T0, count_offset));
     __ AddImmediateDetectOverflow(T7, T4, Smi::RawValue(1), T5, T6);
     __ slt(CMPRES1, T5, ZR);  // T5 is < 0 if there was overflow.
     __ LoadImmediate(T4, Smi::RawValue(Smi::kMaxValue));
     __ movz(T4, T7, CMPRES1);
     __ sw(T4, Address(T0, count_offset));
   }
 
   // Load arguments descriptor into S4.
-  __ lw(S4,  FieldAddress(S5, ICData::arguments_descriptor_offset()));
+  __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
 
   // Get function and call it, if possible.
   __ lw(T0, Address(T0, target_offset));
   __ lw(CODE_REG, FieldAddress(T0, Function::code_offset()));
   __ lw(T4, FieldAddress(T0, Function::entry_point_offset()));
   __ jr(T4);
 
   // Call single step callback in debugger.
   if (FLAG_support_debugger) {
     __ Bind(&stepping);
@@ skipping 14 matching lines @@
 
 void StubCode::GenerateOneArgUnoptimizedStaticCallStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
   GenerateNArgsCheckInlineCacheStub(
       assembler, 1, kStaticCallMissHandlerOneArgRuntimeEntry, Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateTwoArgsUnoptimizedStaticCallStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
-  GenerateNArgsCheckInlineCacheStub(assembler, 2,
-      kStaticCallMissHandlerTwoArgsRuntimeEntry, Token::kILLEGAL);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 2, kStaticCallMissHandlerTwoArgsRuntimeEntry, Token::kILLEGAL);
 }
 
 
 // Stub for compiling a function and jumping to the compiled code.
 // S5: IC-Data (for methods).
 // S4: Arguments descriptor.
 // T0: Function.
 void StubCode::GenerateLazyCompileStub(Assembler* assembler) {
   __ EnterStubFrame();
   __ addiu(SP, SP, Immediate(-3 * kWordSize));
@@ skipping 81 matching lines @@
 // Result in V0: null -> not found, otherwise result (true or false).
 static void GenerateSubtypeNTestCacheStub(Assembler* assembler, int n) {
   __ Comment("SubtypeNTestCacheStub");
   ASSERT((1 <= n) && (n <= 3));
   if (n > 1) {
     // Get instance type arguments.
     __ LoadClass(T0, A0);
     // Compute instance type arguments into T1.
     Label has_no_type_arguments;
     __ LoadObject(T1, Object::null_object());
-    __ lw(T2, FieldAddress(T0,
-        Class::type_arguments_field_offset_in_words_offset()));
-    __ BranchEqual(
-        T2, Immediate(Class::kNoTypeArguments), &has_no_type_arguments);
+    __ lw(T2, FieldAddress(
+                  T0, Class::type_arguments_field_offset_in_words_offset()));
+    __ BranchEqual(T2, Immediate(Class::kNoTypeArguments),
+                   &has_no_type_arguments);
     __ sll(T2, T2, 2);
     __ addu(T2, A0, T2);  // T2 <- A0 + T2 * 4
     __ lw(T1, FieldAddress(T2, 0));
     __ Bind(&has_no_type_arguments);
   }
   __ LoadClassId(T0, A0);
   // A0: instance.
   // A1: instantiator type arguments or NULL.
   // A2: SubtypeTestCache.
   // T0: instance class id.
@@ skipping 21 matching lines @@
     __ beq(T3, T0, &found);
   } else {
     __ bne(T3, T0, &next_iteration);
     __ lw(T3,
           Address(T2, kWordSize * SubtypeTestCache::kInstanceTypeArguments));
     if (n == 2) {
       __ beq(T3, T1, &found);
     } else {
       __ bne(T3, T1, &next_iteration);
       __ lw(T3, Address(T2, kWordSize *
-                        SubtypeTestCache::kInstantiatorTypeArguments));
+                                SubtypeTestCache::kInstantiatorTypeArguments));
       __ beq(T3, A1, &found);
     }
   }
   __ Bind(&next_iteration);
   __ b(&loop);
-  __ delay_slot()->addiu(T2, T2,
-      Immediate(kWordSize * SubtypeTestCache::kTestEntryLength));
+  __ delay_slot()->addiu(
+      T2, T2, Immediate(kWordSize * SubtypeTestCache::kTestEntryLength));
   // Fall through to not found.
   __ Bind(&not_found);
   __ Ret();
   __ delay_slot()->mov(V0, T7);
 
   __ Bind(&found);
   __ Ret();
   __ delay_slot()->lw(V0,
                       Address(T2, kWordSize * SubtypeTestCache::kTestResult));
 }
@@ skipping 48 matching lines @@
 // A3: error object.
 // SP + 4*kWordSize: address of stacktrace object.
 // SP + 5*kWordSize: address of thread.
 // Does not return.
 void StubCode::GenerateJumpToExceptionHandlerStub(Assembler* assembler) {
   ASSERT(kExceptionObjectReg == V0);
   ASSERT(kStackTraceObjectReg == V1);
   __ mov(V0, A3);  // Exception object.
   // MIPS ABI reserves stack space for all arguments. The StackTrace object is
   // the last of five arguments, so it is first pushed on the stack.
-  __ lw(V1, Address(SP, 4 * kWordSize));  // StackTrace object.
-  __ mov(FP, A2);  // Frame_pointer.
+  __ lw(V1, Address(SP, 4 * kWordSize));   // StackTrace object.
+  __ mov(FP, A2);                          // Frame_pointer.
   __ lw(THR, Address(SP, 5 * kWordSize));  // Thread.
   // Set tag.
   __ LoadImmediate(A2, VMTag::kDartTagId);
   __ sw(A2, Assembler::VMTagAddress());
   // Clear top exit frame.
   __ sw(ZR, Address(THR, Thread::top_exit_frame_info_offset()));
   // Restore pool pointer.
   __ RestoreCodePointer();
   __ LoadPoolPointer();
-  __ jr(A0);  // Jump to the exception handler code.
+  __ jr(A0);                     // Jump to the exception handler code.
   __ delay_slot()->mov(SP, A1);  // Stack pointer.
 }
 
 
 // Calls to the runtime to optimize the given function.
 // T0: function to be reoptimized.
 // S4: argument descriptor (preserved).
 void StubCode::GenerateOptimizeFunctionStub(Assembler* assembler) {
   __ Comment("OptimizeFunctionStub");
   __ EnterStubFrame();
   __ addiu(SP, SP, Immediate(-3 * kWordSize));
   __ sw(S4, Address(SP, 2 * kWordSize));
   // Setup space on stack for return value.
   __ sw(ZR, Address(SP, 1 * kWordSize));
   __ sw(T0, Address(SP, 0 * kWordSize));
   __ CallRuntime(kOptimizeInvokedFunctionRuntimeEntry, 1);
   __ Comment("OptimizeFunctionStub return");
-  __ lw(T0, Address(SP, 1 * kWordSize));  // Get Function object
-  __ lw(S4, Address(SP, 2 * kWordSize));  // Restore argument descriptor.
+  __ lw(T0, Address(SP, 1 * kWordSize));       // Get Function object
+  __ lw(S4, Address(SP, 2 * kWordSize));       // Restore argument descriptor.
   __ addiu(SP, SP, Immediate(3 * kWordSize));  // Discard argument.
 
   __ lw(CODE_REG, FieldAddress(T0, Function::code_offset()));
   __ lw(T1, FieldAddress(T0, Function::entry_point_offset()));
   __ LeaveStubFrameAndReturn(T1);
   __ break_(0);
 }
 
 
 // Does identical check (object references are equal or not equal) with special
@@ skipping 342 matching lines @@
 }
 
 
 void StubCode::GenerateFrameAwaitingMaterializationStub(Assembler* assembler) {
   __ break_(0);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS