clang-format runtime/vm

runtime/vm/simulator_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 // Declares a Simulator for ARM64 instructions if we are not generating a native
 // ARM64 binary. This Simulator allows us to run and debug ARM64 code generation
 // on regular desktop machines.
 // Dart calls into generated code by "calling" the InvokeDartCode stub,
 // which will start execution in the Simulator or forwards to the real entry
 // on a ARM64 HW platform.
@@ skipping 32 matching lines @@
   // The currently executing Simulator instance, which is associated to the
   // current isolate
   static Simulator* Current();
 
   // Accessors for register state.
   // The default value for R31Type has to be R31IsSP because get_register is
   // accessed from architecture independent code through SPREG without
   // specifying the type. We also can't translate a dummy value for SPREG into
   // a real value because the architecture independent code expects SPREG to
   // be a real register value.
-  void set_register(
-      Instr* instr, Register reg, int64_t value, R31Type r31t = R31IsSP);
+  void set_register(Instr* instr,
+                    Register reg,
+                    int64_t value,
+                    R31Type r31t = R31IsSP);
   int64_t get_register(Register reg, R31Type r31t = R31IsSP) const;
   void set_wregister(Register reg, int32_t value, R31Type r31t = R31IsSP);
   int32_t get_wregister(Register reg, R31Type r31t = R31IsSP) const;
 
   int32_t get_vregisters(VRegister reg, int idx) const;
   void set_vregisters(VRegister reg, int idx, int32_t value);
 
   int64_t get_vregisterd(VRegister reg, int idx) const;
   void set_vregisterd(VRegister reg, int idx, int64_t value);
 
   void get_vregister(VRegister reg, simd_value_t* value) const;
   void set_vregister(VRegister reg, const simd_value_t& value);
 
-  int64_t get_sp() const {
-    return get_register(SPREG);
-  }
+  int64_t get_sp() const { return get_register(SPREG); }
 
   int64_t get_pc() const;
   int64_t get_last_pc() const;
   void set_pc(int64_t pc);
 
   // Accessors to the internal simulator stack base and top.
   uword StackBase() const { return reinterpret_cast<uword>(stack_); }
   uword StackTop() const;
 
   // Accessor to the instruction counter.
@@ skipping 77 matching lines @@
   uint64_t icount_;
   static int64_t flag_stop_sim_at_;
   SimulatorSetjmpBuffer* last_setjmp_buffer_;
   uword top_exit_frame_info_;
 
   // Registered breakpoints.
   Instr* break_pc_;
   int64_t break_instr_;
 
   // Illegal memory access support.
-  static bool IsIllegalAddress(uword addr) {
-    return addr < 64*1024;
-  }
+  static bool IsIllegalAddress(uword addr) { return addr < 64 * 1024; }
   void HandleIllegalAccess(uword addr, Instr* instr);
 
   // Handles an unaligned memory access.
   void UnalignedAccess(const char* msg, uword addr, Instr* instr);
 
   // Handles a legal instruction that the simulator does not implement.
   void UnimplementedInstruction(Instr* instr);
 
   // Unsupported instructions use Format to print an error and stop execution.
   void Format(Instr* instr, const char* format);
@@ skipping 44 matching lines @@
   // thread (CLREX).
   static bool HasExclusiveAccessAndOpen(uword addr);
 
   // Helper functions to set the conditional flags in the architecture state.
   void SetNZFlagsW(int32_t val);
   bool CarryFromW(int32_t left, int32_t right, int32_t carry);
   bool OverflowFromW(int32_t left, int32_t right, int32_t carry);
 
   void SetNZFlagsX(int64_t val);
   bool CarryFromX(int64_t alu_out, int64_t left, int64_t right, bool addition);
-  bool OverflowFromX(
-      int64_t alu_out, int64_t left, int64_t right, bool addition);
+  bool OverflowFromX(int64_t alu_out,
+                     int64_t left,
+                     int64_t right,
+                     bool addition);
 
   void SetCFlag(bool val);
   void SetVFlag(bool val);
 
   int64_t ShiftOperand(uint8_t reg_size,
                        int64_t value,
                        Shift shift_type,
                        uint8_t amount);
 
   int64_t ExtendOperand(uint8_t reg_size,
                         int64_t value,
                         Extend extend_type,
                         uint8_t amount);
 
   int64_t DecodeShiftExtendOperand(Instr* instr);
 
   bool ConditionallyExecute(Instr* instr);
 
   void DoRedirectedCall(Instr* instr);
 
   // Decode instructions.
   void InstructionDecode(Instr* instr);
-  #define DECODE_OP(op)                                                        \
-    void Decode##op(Instr* instr);
+#define DECODE_OP(op) void Decode##op(Instr* instr);
   APPLY_OP_LIST(DECODE_OP)
-  #undef DECODE_OP
+#undef DECODE_OP
 
   // Executes ARM64 instructions until the PC reaches kEndSimulatingPC.
   void Execute();
 
   // Returns true if tracing of executed instructions is enabled.
   bool IsTracingExecution() const;
 
   // Longjmp support for exceptions.
-  SimulatorSetjmpBuffer* last_setjmp_buffer() {
-    return last_setjmp_buffer_;
-  }
+  SimulatorSetjmpBuffer* last_setjmp_buffer() { return last_setjmp_buffer_; }
   void set_last_setjmp_buffer(SimulatorSetjmpBuffer* buffer) {
     last_setjmp_buffer_ = buffer;
   }
 
   friend class SimulatorDebugger;
   friend class SimulatorSetjmpBuffer;
   DISALLOW_COPY_AND_ASSIGN(Simulator);
 };
 
 }  // namespace dart
 
 #endif  // RUNTIME_VM_SIMULATOR_ARM64_H_