clang-format runtime/vm

runtime/vm/simulator_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <setjmp.h>  // NOLINT
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 // Only build the simulator if not compiling for real ARM hardware.
 #if defined(USING_SIMULATOR)
 
 #include "vm/simulator.h"
 
 #include "vm/assembler.h"
 #include "vm/constants_arm.h"
 #include "vm/cpu.h"
 #include "vm/disassembler.h"
 #include "vm/lockers.h"
 #include "vm/native_arguments.h"
 #include "vm/stack_frame.h"
 #include "vm/os_thread.h"
 
 namespace dart {
 
-DEFINE_FLAG(uint64_t, trace_sim_after, ULLONG_MAX,
+DEFINE_FLAG(uint64_t,
+            trace_sim_after,
+            ULLONG_MAX,
             "Trace simulator execution after instruction count reached.");
-DEFINE_FLAG(uint64_t, stop_sim_at, ULLONG_MAX,
+DEFINE_FLAG(uint64_t,
+            stop_sim_at,
+            ULLONG_MAX,
             "Instruction address or instruction count to stop simulator at.");
 
 
 // This macro provides a platform independent use of sscanf. The reason for
 // SScanF not being implemented in a platform independent way through
 // OS in the same way as SNPrint is that the Windows C Run-Time
 // Library does not provide vsscanf.
 #define SScanF sscanf  // NOLINT
 
 
@@ skipping 49 matching lines @@
 
  private:
   Simulator* sim_;
 
   bool GetValue(char* desc, uint32_t* value);
   bool GetFValue(char* desc, float* value);
   bool GetDValue(char* desc, double* value);
 
   static TokenPosition GetApproximateTokenIndex(const Code& code, uword pc);
 
-  static void PrintDartFrame(uword pc, uword fp, uword sp,
+  static void PrintDartFrame(uword pc,
+                             uword fp,
+                             uword sp,
                              const Function& function,
                              TokenPosition token_pos,
                              bool is_optimized,
                              bool is_inlined);
   void PrintBacktrace();
 
   // Set or delete a breakpoint. Returns true if successful.
   bool SetBreakpoint(Instr* breakpc);
   bool DeleteBreakpoint(Instr* breakpc);
 
   // Undo and redo all breakpoints. This is needed to bracket disassembly and
   // execution to skip past breakpoints when run from the debugger.
   void UndoBreakpoints();
   void RedoBreakpoints();
 };
 
 
 SimulatorDebugger::SimulatorDebugger(Simulator* sim) {
   sim_ = sim;
 }
 
 
-SimulatorDebugger::~SimulatorDebugger() {
-}
+SimulatorDebugger::~SimulatorDebugger() {}
 
 
 void SimulatorDebugger::Stop(Instr* instr, const char* message) {
   OS::Print("Simulator hit %s\n", message);
   Debug();
 }
 
 
 static Register LookupCpuRegisterByName(const char* name) {
-  static const char* kNames[] = {
-      "r0",  "r1",  "r2",  "r3",
-      "r4",  "r5",  "r6",  "r7",
-      "r8",  "r9",  "r10", "r11",
-      "r12", "r13", "r14", "r15",
-      "pc",  "lr",  "sp",  "ip",
-      "fp",  "pp",  "ctx"
-  };
-  static const Register kRegisters[] = {
-      R0,  R1,  R2,  R3,
-      R4,  R5,  R6,  R7,
-      R8,  R9,  R10, R11,
-      R12, R13, R14, R15,
-      PC,  LR,  SP,  IP,
-      FP,  PP,  CTX
-  };
+  static const char* kNames[] = {"r0",  "r1",  "r2",  "r3",  "r4",  "r5",
+                                 "r6",  "r7",  "r8",  "r9",  "r10", "r11",
+                                 "r12", "r13", "r14", "r15", "pc",  "lr",
+                                 "sp",  "ip",  "fp",  "pp",  "ctx"};
+  static const Register kRegisters[] = {R0, R1, R2,  R3,  R4,  R5,  R6,  R7,
+                                        R8, R9, R10, R11, R12, R13, R14, R15,
+                                        PC, LR, SP,  IP,  FP,  PP,  CTX};
   ASSERT(ARRAY_SIZE(kNames) == ARRAY_SIZE(kRegisters));
   for (unsigned i = 0; i < ARRAY_SIZE(kNames); i++) {
     if (strcmp(kNames[i], name) == 0) {
       return kRegisters[i];
     }
   }
   return kNoRegister;
 }
 
 
@@ skipping 79 matching lines @@
       }
       *value = *(reinterpret_cast<double*>(addr));
       return true;
     }
   }
   return false;
 }
 
 
 TokenPosition SimulatorDebugger::GetApproximateTokenIndex(const Code& code,
-                                                            uword pc) {
+                                                          uword pc) {
   TokenPosition token_pos = TokenPosition::kNoSource;
   uword pc_offset = pc - code.PayloadStart();
   const PcDescriptors& descriptors =
       PcDescriptors::Handle(code.pc_descriptors());
   PcDescriptors::Iterator iter(descriptors, RawPcDescriptors::kAnyKind);
   while (iter.MoveNext()) {
     if (iter.PcOffset() == pc_offset) {
       return iter.TokenPos();
     } else if (!token_pos.IsReal() && (iter.PcOffset() > pc_offset)) {
       token_pos = iter.TokenPos();
     }
   }
   return token_pos;
 }
 
 
-void SimulatorDebugger::PrintDartFrame(uword pc, uword fp, uword sp,
+void SimulatorDebugger::PrintDartFrame(uword pc,
+                                       uword fp,
+                                       uword sp,
                                        const Function& function,
                                        TokenPosition token_pos,
                                        bool is_optimized,
                                        bool is_inlined) {
   const Script& script = Script::Handle(function.script());
   const String& func_name = String::Handle(function.QualifiedScrubbedName());
   const String& url = String::Handle(script.url());
   intptr_t line = -1;
   intptr_t column = -1;
   if (token_pos.IsReal()) {
     script.GetTokenLocation(token_pos, &line, &column);
   }
-  OS::Print("pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s%s (%s:%" Pd
-            ":%" Pd ")\n",
-            pc, fp, sp,
-            is_optimized ? (is_inlined ? "inlined " : "optimized ") : "",
-            func_name.ToCString(),
-            url.ToCString(),
-            line, column);
+  OS::Print(
+      "pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s%s (%s:%" Pd ":%" Pd ")\n", pc,
+      fp, sp, is_optimized ? (is_inlined ? "inlined " : "optimized ") : "",
+      func_name.ToCString(), url.ToCString(), line, column);
 }
 
 
 void SimulatorDebugger::PrintBacktrace() {
-  StackFrameIterator frames(sim_->get_register(FP),
-                            sim_->get_register(SP),
+  StackFrameIterator frames(sim_->get_register(FP), sim_->get_register(SP),
                             sim_->get_pc(),
                             StackFrameIterator::kDontValidateFrames);
   StackFrame* frame = frames.NextFrame();
   ASSERT(frame != NULL);
   Function& function = Function::Handle();
   Function& inlined_function = Function::Handle();
   Code& code = Code::Handle();
   Code& unoptimized_code = Code::Handle();
   while (frame != NULL) {
     if (frame->IsDartFrame()) {
       code = frame->LookupDartCode();
       function = code.function();
       if (code.is_optimized()) {
         // For optimized frames, extract all the inlined functions if any
         // into the stack trace.
         InlinedFunctionsIterator it(code, frame->pc());
         while (!it.Done()) {
           // Print each inlined frame with its pc in the corresponding
           // unoptimized frame.
           inlined_function = it.function();
           unoptimized_code = it.code();
           uword unoptimized_pc = it.pc();
           it.Advance();
           if (!it.Done()) {
-            PrintDartFrame(unoptimized_pc, frame->fp(), frame->sp(),
-                           inlined_function,
-                           GetApproximateTokenIndex(unoptimized_code,
-                                                    unoptimized_pc),
-                           true, true);
+            PrintDartFrame(
+                unoptimized_pc, frame->fp(), frame->sp(), inlined_function,
+                GetApproximateTokenIndex(unoptimized_code, unoptimized_pc),
+                true, true);
           }
         }
         // Print the optimized inlining frame below.
       }
-      PrintDartFrame(frame->pc(), frame->fp(), frame->sp(),
-                     function,
+      PrintDartFrame(frame->pc(), frame->fp(), frame->sp(), function,
                      GetApproximateTokenIndex(code, frame->pc()),
                      code.is_optimized(), false);
     } else {
       OS::Print("pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s frame\n",
                 frame->pc(), frame->fp(), frame->sp(),
-                frame->IsEntryFrame() ? "entry" :
-                    frame->IsExitFrame() ? "exit" :
-                        frame->IsStubFrame() ? "stub" : "invalid");
+                frame->IsEntryFrame()
+                    ? "entry"
+                    : frame->IsExitFrame()
+                          ? "exit"
+                          : frame->IsStubFrame() ? "stub" : "invalid");
     }
     frame = frames.NextFrame();
   }
 }
 
 
 bool SimulatorDebugger::SetBreakpoint(Instr* breakpc) {
   // Check if a breakpoint can be set. If not return without any side-effects.
   if (sim_->break_pc_ != NULL) {
     return false;
@@ skipping 74 matching lines @@
       FATAL("ReadLine failed");
     } else {
       // Use sscanf to parse the individual parts of the command line. At the
       // moment no command expects more than two parameters.
       int args = SScanF(line,
                         "%" XSTR(COMMAND_SIZE) "s "
                         "%" XSTR(ARG_SIZE) "s "
                         "%" XSTR(ARG_SIZE) "s",
                         cmd, arg1, arg2);
       if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) {
-        OS::Print("c/cont -- continue execution\n"
-                  "disasm -- disassemble instrs at current pc location\n"
-                  "  other variants are:\n"
-                  "    disasm <address>\n"
-                  "    disasm <address> <number_of_instructions>\n"
-                  "  by default 10 instrs are disassembled\n"
-                  "del -- delete breakpoints\n"
-                  "flags -- print flag values\n"
-                  "gdb -- transfer control to gdb\n"
-                  "h/help -- print this help string\n"
-                  "break <address> -- set break point at specified address\n"
-                  "p/print <reg or icount or value or *addr> -- print integer\n"
-                  "ps/printsingle <sreg or *addr> -- print float value\n"
-                  "pd/printdouble <dreg or *addr> -- print double value\n"
-                  "po/printobject <*reg or *addr> -- print object\n"
-                  "si/stepi -- single step an instruction\n"
-                  "trace -- toggle execution tracing mode\n"
-                  "bt -- print backtrace\n"
-                  "unstop -- if current pc is a stop instr make it a nop\n"
-                  "q/quit -- Quit the debugger and exit the program\n");
+        OS::Print(
+            "c/cont -- continue execution\n"
+            "disasm -- disassemble instrs at current pc location\n"
+            "  other variants are:\n"
+            "    disasm <address>\n"
+            "    disasm <address> <number_of_instructions>\n"
+            "  by default 10 instrs are disassembled\n"
+            "del -- delete breakpoints\n"
+            "flags -- print flag values\n"
+            "gdb -- transfer control to gdb\n"
+            "h/help -- print this help string\n"
+            "break <address> -- set break point at specified address\n"
+            "p/print <reg or icount or value or *addr> -- print integer\n"
+            "ps/printsingle <sreg or *addr> -- print float value\n"
+            "pd/printdouble <dreg or *addr> -- print double value\n"
+            "po/printobject <*reg or *addr> -- print object\n"
+            "si/stepi -- single step an instruction\n"
+            "trace -- toggle execution tracing mode\n"
+            "bt -- print backtrace\n"
+            "unstop -- if current pc is a stop instr make it a nop\n"
+            "q/quit -- Quit the debugger and exit the program\n");
       } else if ((strcmp(cmd, "quit") == 0) || (strcmp(cmd, "q") == 0)) {
         OS::Print("Quitting\n");
         OS::Exit(0);
       } else if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) {
         sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
       } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
         // Execute the one instruction we broke at with breakpoints disabled.
         sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
         // Leave the debugger shell.
         done = true;
@@ skipping 23 matching lines @@
           }
         } else {
           OS::Print("printfloat <sreg or *addr>\n");
         }
       } else if ((strcmp(cmd, "pd") == 0) ||
                  (strcmp(cmd, "printdouble") == 0)) {
         if (args == 2) {
           double dvalue;
           if (GetDValue(arg1, &dvalue)) {
             uint64_t long_value = bit_cast<uint64_t, double>(dvalue);
-            OS::Print("%s: %llu 0x%llx %.8g\n",
-                arg1, long_value, long_value, dvalue);
+            OS::Print("%s: %llu 0x%llx %.8g\n", arg1, long_value, long_value,
+                      dvalue);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("printdouble <dreg or *addr>\n");
         }
       } else if ((strcmp(cmd, "po") == 0) ||
                  (strcmp(cmd, "printobject") == 0)) {
         if (args == 2) {
           uint32_t value;
           // Make the dereferencing '*' optional.
           if (((arg1[0] == '*') && GetValue(arg1 + 1, &value)) ||
               GetValue(arg1, &value)) {
             if (Isolate::Current()->heap()->Contains(value)) {
               OS::Print("%s: \n", arg1);
 #if defined(DEBUG)
-              const Object& obj = Object::Handle(
-                  reinterpret_cast<RawObject*>(value));
+              const Object& obj =
+                  Object::Handle(reinterpret_cast<RawObject*>(value));
               obj.Print();
 #endif  // defined(DEBUG)
             } else {
               OS::Print("0x%x is not an object reference\n", value);
             }
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("printobject <*reg or *addr>\n");
@@ skipping 113 matching lines @@
   OS::Print("%s", prompt);
   while (keep_going) {
     if (fgets(line_buf, sizeof(line_buf), stdin) == NULL) {
       // fgets got an error. Just give up.
       if (result != NULL) {
         delete[] result;
       }
       return NULL;
     }
     intptr_t len = strlen(line_buf);
-    if (len > 1 &&
-        line_buf[len - 2] == '\\' &&
-        line_buf[len - 1] == '\n') {
+    if (len > 1 && line_buf[len - 2] == '\\' && line_buf[len - 1] == '\n') {
       // When we read a line that ends with a "\" we remove the escape and
       // append the remainder.
       line_buf[len - 2] = '\n';
       line_buf[len - 1] = 0;
       len -= 1;
     } else if ((len > 0) && (line_buf[len - 1] == '\n')) {
       // Since we read a new line we are done reading the line. This
       // will exit the loop after copying this buffer into the result.
       keep_going = false;
     }
@@ skipping 25 matching lines @@
     offset += len;
   }
   ASSERT(result != NULL);
   result[offset] = '\0';
   return result;
 }
 
 
 // Synchronization primitives support.
 Mutex* Simulator::exclusive_access_lock_ = NULL;
-Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags] =
-    {{NULL, 0}};
+Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags] = {
+    {NULL, 0}};
 int Simulator::next_address_tag_ = 0;
 
 
 void Simulator::InitOnce() {
   // Setup exclusive access state lock.
   exclusive_access_lock_ = new Mutex();
 }
 
 
 Simulator::Simulator() {
   // Setup simulator support first. Some of this information is needed to
   // setup the architecture state.
   // We allocate the stack here, the size is computed as the sum of
   // the size specified by the user and the buffer space needed for
   // handling stack overflow exceptions. To be safe in potential
   // stack underflows we also add some underflow buffer space.
-  stack_ = new char[(OSThread::GetSpecifiedStackSize() +
-                     OSThread::kStackSizeBuffer +
-                     kSimulatorStackUnderflowSize)];
+  stack_ =
+      new char[(OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer +
+                kSimulatorStackUnderflowSize)];
   pc_modified_ = false;
   icount_ = 0;
   break_pc_ = NULL;
   break_instr_ = 0;
   last_setjmp_buffer_ = NULL;
   top_exit_frame_info_ = 0;
 
   // Setup architecture state.
   // All registers are initialized to zero to start with.
   for (int i = 0; i < kNumberOfCpuRegisters; i++) {
@@ skipping 11 matching lines @@
   // access violation if the simulator ever tries to execute it.
   registers_[PC] = kBadLR;
   registers_[LR] = kBadLR;
 
   // All double-precision registers are initialized to zero.
   for (int i = 0; i < kNumberOfDRegisters; i++) {
     dregisters_[i] = 0;
   }
   // Since VFP registers are overlapping, single-precision registers should
   // already be initialized.
-  ASSERT(2*kNumberOfDRegisters >= kNumberOfSRegisters);
+  ASSERT(2 * kNumberOfDRegisters >= kNumberOfSRegisters);
   for (int i = 0; i < kNumberOfSRegisters; i++) {
     ASSERT(sregisters_[i] == 0.0);
   }
   fp_n_flag_ = false;
   fp_z_flag_ = false;
   fp_c_flag_ = false;
   fp_v_flag_ = false;
 }
 
 
@@ skipping 58 matching lines @@
               int argument_count)
       : external_function_(external_function),
         call_kind_(call_kind),
         argument_count_(argument_count),
         svc_instruction_(Instr::kSimulatorRedirectInstruction) {
     // Atomically prepend this element to the front of the global list.
     // Note: Since elements are never removed, there is no ABA issue.
     Redirection* list_head = list_;
     do {
       next_ = list_head;
-      list_head = reinterpret_cast<Redirection*>(
-          AtomicOperations::CompareAndSwapWord(
-              reinterpret_cast<uword*>(&list_),
-              reinterpret_cast<uword>(next_),
+      list_head =
+          reinterpret_cast<Redirection*>(AtomicOperations::CompareAndSwapWord(
+              reinterpret_cast<uword*>(&list_), reinterpret_cast<uword>(next_),
               reinterpret_cast<uword>(this)));
     } while (list_head != next_);
   }
 
   uword external_function_;
   Simulator::CallKind call_kind_;
   int argument_count_;
   uint32_t svc_instruction_;
   Redirection* next_;
   static Redirection* list_;
@@ skipping 136 matching lines @@
   return dregisters_[reg];
 }
 
 
 void Simulator::HandleIllegalAccess(uword addr, Instr* instr) {
   uword fault_pc = get_pc();
   // The debugger will not be able to single step past this instruction, but
   // it will be possible to disassemble the code and inspect registers.
   char buffer[128];
   snprintf(buffer, sizeof(buffer),
-           "illegal memory access at 0x%" Px ", pc=0x%" Px "\n",
-           addr, fault_pc);
+           "illegal memory access at 0x%" Px ", pc=0x%" Px "\n", addr,
+           fault_pc);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   // The debugger will return control in non-interactive mode.
   FATAL("Cannot continue execution after illegal memory access.");
 }
 
 
 // Processor versions prior to ARMv7 could not do unaligned reads and writes.
 // On some ARM platforms an interrupt is caused.  On others it does a funky
 // rotation thing.  However, from version v7, unaligned access is supported.
 // Note that simulator runs have the runtime system running directly on the host
 // system and only generated code is executed in the simulator.  Since the host
 // is typically IA32 we will get the correct ARMv7-like behaviour on unaligned
 // accesses, but we should actually not generate code accessing unaligned data,
 // so we still want to know and abort if we encounter such code.
 void Simulator::UnalignedAccess(const char* msg, uword addr, Instr* instr) {
   // The debugger will not be able to single step past this instruction, but
   // it will be possible to disassemble the code and inspect registers.
   char buffer[64];
-  snprintf(buffer, sizeof(buffer),
-           "unaligned %s at 0x%" Px ", pc=%p\n", msg, addr, instr);
+  snprintf(buffer, sizeof(buffer), "unaligned %s at 0x%" Px ", pc=%p\n", msg,
+           addr, instr);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   // The debugger will return control in non-interactive mode.
   FATAL("Cannot continue execution after unaligned access.");
 }
 
 
 void Simulator::UnimplementedInstruction(Instr* instr) {
   char buffer[64];
   snprintf(buffer, sizeof(buffer), "Unimplemented instruction: pc=%p\n", instr);
@@ skipping 171 matching lines @@
                          static_cast<uword>(new_value));
 }
 
 
 // Returns the top of the stack area to enable checking for stack pointer
 // validity.
 uword Simulator::StackTop() const {
   // To be safe in potential stack underflows we leave some buffer above and
   // set the stack top.
   return StackBase() +
-      (OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer);
+         (OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer);
 }
 
 
 bool Simulator::IsTracingExecution() const {
   return icount_ > FLAG_trace_sim_after;
 }
 
 
 // Unsupported instructions use Format to print an error and stop execution.
 void Simulator::Format(Instr* instr, const char* format) {
-  OS::Print("Simulator found unsupported instruction:\n 0x%p: %s\n",
-            instr,
+  OS::Print("Simulator found unsupported instruction:\n 0x%p: %s\n", instr,
             format);
   UNIMPLEMENTED();
 }
 
 
 // Checks if the current instruction should be executed based on its
 // condition bits.
 bool Simulator::ConditionallyExecute(Instr* instr) {
   switch (instr->ConditionField()) {
-    case EQ: return z_flag_;
-    case NE: return !z_flag_;
-    case CS: return c_flag_;
-    case CC: return !c_flag_;
-    case MI: return n_flag_;
-    case PL: return !n_flag_;
-    case VS: return v_flag_;
-    case VC: return !v_flag_;
-    case HI: return c_flag_ && !z_flag_;
-    case LS: return !c_flag_ || z_flag_;
-    case GE: return n_flag_ == v_flag_;
-    case LT: return n_flag_ != v_flag_;
-    case GT: return !z_flag_ && (n_flag_ == v_flag_);
-    case LE: return z_flag_ || (n_flag_ != v_flag_);
-    case AL: return true;
-    default: UNREACHABLE();
+    case EQ:
+      return z_flag_;
+    case NE:
+      return !z_flag_;
+    case CS:
+      return c_flag_;
+    case CC:
+      return !c_flag_;
+    case MI:
+      return n_flag_;
+    case PL:
+      return !n_flag_;
+    case VS:
+      return v_flag_;
+    case VC:
+      return !v_flag_;
+    case HI:
+      return c_flag_ && !z_flag_;
+    case LS:
+      return !c_flag_ || z_flag_;
+    case GE:
+      return n_flag_ == v_flag_;
+    case LT:
+      return n_flag_ != v_flag_;
+    case GT:
+      return !z_flag_ && (n_flag_ == v_flag_);
+    case LE:
+      return z_flag_ || (n_flag_ != v_flag_);
+    case AL:
+      return true;
+    default:
+      UNREACHABLE();
   }
   return false;
 }
 
 
 // Calculate and set the Negative and Zero flags.
 void Simulator::SetNZFlags(int32_t val) {
   n_flag_ = (val < 0);
   z_flag_ = (val == 0);
 }
@@ skipping 89 matching lines @@
       }
 
       default: {
         UNREACHABLE();
         break;
       }
     }
   } else {
     // by register
     Register rs = instr->RsField();
-    shift_amount = get_register(rs) &0xff;
+    shift_amount = get_register(rs) & 0xff;
     switch (shift) {
       case ASR: {
         if (shift_amount == 0) {
           *carry_out = c_flag_;
         } else if (shift_amount < 32) {
           result >>= (shift_amount - 1);
           *carry_out = (result & 1) == 1;
           result >>= 1;
         } else {
           ASSERT(shift_amount >= 32);
@@ skipping 147 matching lines @@
     }
     ASSERT(end_address == address);
   }
 }
 
 
 // Calls into the Dart runtime are based on this interface.
 typedef void (*SimulatorRuntimeCall)(NativeArguments arguments);
 
 // Calls to leaf Dart runtime functions are based on this interface.
-typedef int32_t (*SimulatorLeafRuntimeCall)(
-    int32_t r0, int32_t r1, int32_t r2, int32_t r3);
+typedef int32_t (*SimulatorLeafRuntimeCall)(int32_t r0,
+                                            int32_t r1,
+                                            int32_t r2,
+                                            int32_t r3);
 
 // Calls to leaf float Dart runtime functions are based on this interface.
 typedef double (*SimulatorLeafFloatRuntimeCall)(double d0, double d1);
 
 // Calls to native Dart functions are based on this interface.
 typedef void (*SimulatorBootstrapNativeCall)(NativeArguments* arguments);
 typedef void (*SimulatorNativeCall)(NativeArguments* arguments, uword target);
 
 
 void Simulator::SupervisorCall(Instr* instr) {
@@ skipping 11 matching lines @@
         }
 
         if ((redirection->call_kind() == kRuntimeCall) ||
             (redirection->call_kind() == kBootstrapNativeCall) ||
             (redirection->call_kind() == kNativeCall)) {
           // Set the top_exit_frame_info of this simulator to the native stack.
           set_top_exit_frame_info(Thread::GetCurrentStackPointer());
         }
         if (redirection->call_kind() == kRuntimeCall) {
           NativeArguments arguments;
-          ASSERT(sizeof(NativeArguments) == 4*kWordSize);
+          ASSERT(sizeof(NativeArguments) == 4 * kWordSize);
           arguments.thread_ = reinterpret_cast<Thread*>(get_register(R0));
           arguments.argc_tag_ = get_register(R1);
           arguments.argv_ = reinterpret_cast<RawObject**>(get_register(R2));
           arguments.retval_ = reinterpret_cast<RawObject**>(get_register(R3));
           SimulatorRuntimeCall target =
               reinterpret_cast<SimulatorRuntimeCall>(external);
           target(arguments);
           set_register(R0, icount_);  // Zap result register from void function.
           set_register(R1, icount_);
         } else if (redirection->call_kind() == kLeafRuntimeCall) {
           ASSERT((0 <= redirection->argument_count()) &&
                  (redirection->argument_count() <= 4));
           int32_t r0 = get_register(R0);
           int32_t r1 = get_register(R1);
           int32_t r2 = get_register(R2);
           int32_t r3 = get_register(R3);
           SimulatorLeafRuntimeCall target =
               reinterpret_cast<SimulatorLeafRuntimeCall>(external);
           r0 = target(r0, r1, r2, r3);
-          set_register(R0, r0);  // Set returned result from function.
+          set_register(R0, r0);       // Set returned result from function.
           set_register(R1, icount_);  // Zap unused result register.
         } else if (redirection->call_kind() == kLeafFloatRuntimeCall) {
           ASSERT((0 <= redirection->argument_count()) &&
                  (redirection->argument_count() <= 2));
           SimulatorLeafFloatRuntimeCall target =
               reinterpret_cast<SimulatorLeafFloatRuntimeCall>(external);
           if (TargetCPUFeatures::hardfp_supported()) {
             // If we're doing "hardfp", the double arguments are already in the
             // floating point registers.
             double d0 = get_dregister(D0);
@@ skipping 44 matching lines @@
         set_register(R2, icount_);
         set_register(R3, icount_);
         set_register(IP, icount_);
         set_register(LR, icount_);
         if (TargetCPUFeatures::vfp_supported()) {
           double zap_dvalue = static_cast<double>(icount_);
           // Do not zap D0, as it may contain a float result.
           for (int i = D1; i <= D7; i++) {
             set_dregister(static_cast<DRegister>(i), zap_dvalue);
           }
-          // The above loop also zaps overlapping registers S2-S15.
-          // Registers D8-D15 (overlapping with S16-S31) are preserved.
+// The above loop also zaps overlapping registers S2-S15.
+// Registers D8-D15 (overlapping with S16-S31) are preserved.
 #if defined(VFPv3_D32)
           for (int i = D16; i <= D31; i++) {
             set_dregister(static_cast<DRegister>(i), zap_dvalue);
           }
 #endif
         }
 
         // Return.
         set_pc(saved_lr);
       } else {
@@ skipping 70 matching lines @@
                   reinterpret_cast<intptr_t>(instr) - Instr::kInstrSize);
               set_pc(get_pc() + Instr::kInstrSize);
               dbg.Stop(instr, message);
             } else {
               char buffer[32];
               snprintf(buffer, sizeof(buffer), "bkpt #0x%x", imm);
               set_pc(get_pc() + Instr::kInstrSize);
               dbg.Stop(instr, buffer);
             }
           } else {
-             // Format(instr, "smc'cond");
+            // Format(instr, "smc'cond");
             UnimplementedInstruction(instr);
           }
           break;
         }
         default: {
           UnimplementedInstruction(instr);
           break;
         }
       }
     } else if (instr->IsMultiplyOrSyncPrimitive()) {
       if (instr->Bit(24) == 0) {
         // multiply instructions.
         Register rn = instr->RnField();
         Register rd = instr->RdField();
         Register rs = instr->RsField();
         Register rm = instr->RmField();
         int32_t rm_val = get_register(rm);
         int32_t rs_val = get_register(rs);
         int32_t rd_val = 0;
         switch (instr->Bits(21, 3)) {
           case 1:
-            // Registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
-            // Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
+          // Registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
+          // Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
           case 3: {
             // Registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
             // Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
             rd_val = get_register(rd);
             // fall through
           }
           case 0: {
             // Registers rd, rn, rm are encoded as rn, rm, rs.
             // Format(instr, "mul'cond's 'rn, 'rm, 'rs");
             int32_t alu_out = rm_val * rs_val;
             if (instr->Bits(21, 3) == 3) {  // mls
               if (TargetCPUFeatures::arm_version() != ARMv7) {
                 UnimplementedInstruction(instr);
                 break;
               }
               alu_out = -alu_out;
             }
             alu_out += rd_val;
             set_register(rn, alu_out);
             if (instr->HasS()) {
               SetNZFlags(alu_out);
             }
             break;
           }
           case 4:
-            // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
-            // Format(instr, "umull'cond's 'rd, 'rn, 'rm, 'rs");
+          // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
+          // Format(instr, "umull'cond's 'rd, 'rn, 'rm, 'rs");
           case 6: {
             // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
             // Format(instr, "smull'cond's 'rd, 'rn, 'rm, 'rs");
             int64_t result;
             if (instr->Bits(21, 3) == 4) {  // umull
-              uint64_t left_op  = static_cast<uint32_t>(rm_val);
+              uint64_t left_op = static_cast<uint32_t>(rm_val);
               uint64_t right_op = static_cast<uint32_t>(rs_val);
               result = left_op * right_op;  // Unsigned multiplication.
-            } else {  // smull
-              int64_t left_op  = static_cast<int32_t>(rm_val);
+            } else {                        // smull
+              int64_t left_op = static_cast<int32_t>(rm_val);
               int64_t right_op = static_cast<int32_t>(rs_val);
               result = left_op * right_op;  // Signed multiplication.
             }
             int32_t hi_res = Utils::High32Bits(result);
             int32_t lo_res = Utils::Low32Bits(result);
             set_register(rd, lo_res);
             set_register(rn, hi_res);
             if (instr->HasS()) {
               if (lo_res != 0) {
                 // Collapse bits 0..31 into bit 32 so that 32-bit Z check works.
                 hi_res |= 1;
               }
-              ASSERT((result == 0) == (hi_res == 0));  // Z bit
+              ASSERT((result == 0) == (hi_res == 0));                 // Z bit
               ASSERT(((result & (1LL << 63)) != 0) == (hi_res < 0));  // N bit
               SetNZFlags(hi_res);
             }
             break;
           }
           case 2:
             // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
             // Format(instr, "umaal'cond's 'rd, 'rn, 'rm, 'rs");
             if (TargetCPUFeatures::arm_version() == ARMv5TE) {
               // umaal is only in ARMv6 and above.
               UnimplementedInstruction(instr);
             }
           case 5:
-            // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
-            // Format(instr, "umlal'cond's 'rd, 'rn, 'rm, 'rs");
+          // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
+          // Format(instr, "umlal'cond's 'rd, 'rn, 'rm, 'rs");
           case 7: {
             // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
             // Format(instr, "smlal'cond's 'rd, 'rn, 'rm, 'rs");
             int32_t rd_lo_val = get_register(rd);
             int32_t rd_hi_val = get_register(rn);
             uint32_t accum_lo = static_cast<uint32_t>(rd_lo_val);
             int32_t accum_hi = static_cast<int32_t>(rd_hi_val);
             int64_t accum = Utils::LowHighTo64Bits(accum_lo, accum_hi);
             int64_t result;
             if (instr->Bits(21, 3) == 5) {  // umlal
-              uint64_t left_op  = static_cast<uint32_t>(rm_val);
+              uint64_t left_op = static_cast<uint32_t>(rm_val);
               uint64_t right_op = static_cast<uint32_t>(rs_val);
               result = accum + left_op * right_op;  // Unsigned multiplication.
-            } else if (instr->Bits(21, 3) == 7) {  // smlal
-              int64_t left_op  = static_cast<int32_t>(rm_val);
+            } else if (instr->Bits(21, 3) == 7) {   // smlal
+              int64_t left_op = static_cast<int32_t>(rm_val);
               int64_t right_op = static_cast<int32_t>(rs_val);
               result = accum + left_op * right_op;  // Signed multiplication.
             } else {
               ASSERT(instr->Bits(21, 3) == 2);  // umaal
               ASSERT(!instr->HasS());
-              uint64_t left_op  = static_cast<uint32_t>(rm_val);
+              uint64_t left_op = static_cast<uint32_t>(rm_val);
               uint64_t right_op = static_cast<uint32_t>(rs_val);
               result = left_op * right_op +  // Unsigned multiplication.
-                  static_cast<uint32_t>(rd_lo_val) +
-                  static_cast<uint32_t>(rd_hi_val);
+                       static_cast<uint32_t>(rd_lo_val) +
+                       static_cast<uint32_t>(rd_hi_val);
             }
             int32_t hi_res = Utils::High32Bits(result);
             int32_t lo_res = Utils::Low32Bits(result);
             set_register(rd, lo_res);
             set_register(rn, hi_res);
             if (instr->HasS()) {
               if (lo_res != 0) {
                 // Collapse bits 0..31 into bit 32 so that 32-bit Z check works.
                 hi_res |= 1;
               }
-              ASSERT((result == 0) == (hi_res == 0));  // Z bit
+              ASSERT((result == 0) == (hi_res == 0));                 // Z bit
               ASSERT(((result & (1LL << 63)) != 0) == (hi_res < 0));  // N bit
               SetNZFlags(hi_res);
             }
             break;
           }
           default: {
             UnimplementedInstruction(instr);
             break;
           }
         }
@@ skipping 620 matching lines @@
 }
 
 
 void Simulator::DecodeType5(Instr* instr) {
   // Format(instr, "b'l'cond 'target");
   int off = (instr->SImmed24Field() << 2) + 8;
   intptr_t pc = get_pc();
   if (instr->HasLink()) {
     set_register(LR, pc + Instr::kInstrSize);
   }
-  set_pc(pc+off);
+  set_pc(pc + off);
 }
 
 
 void Simulator::DecodeType6(Instr* instr) {
   if (instr->IsVFPDoubleTransfer()) {
     Register rd = instr->RdField();
     Register rn = instr->RnField();
     if (instr->Bit(8) == 0) {
       SRegister sm = instr->SmField();
       SRegister sm1 = static_cast<SRegister>(sm + 1);
       ASSERT(sm1 < kNumberOfSRegisters);
       if (instr->Bit(20) == 1) {
         // Format(instr, "vmovrrs'cond 'rd, 'rn, {'sm', 'sm1}");
         set_register(rd, get_sregister_bits(sm));
         set_register(rn, get_sregister_bits(sm1));
       } else {
         // Format(instr, "vmovsrr'cond {'sm, 'sm1}, 'rd', 'rn");
         set_sregister_bits(sm, get_register(rd));
         set_sregister_bits(sm1, get_register(rn));
       }
     } else {
       DRegister dm = instr->DmField();
       if (instr->Bit(20) == 1) {
         // Format(instr, "vmovrrd'cond 'rd, 'rn, 'dm");
         int64_t dm_val = get_dregister_bits(dm);
         set_register(rd, Utils::Low32Bits(dm_val));
         set_register(rn, Utils::High32Bits(dm_val));
       } else {
         // Format(instr, "vmovdrr'cond 'dm, 'rd, 'rn");
-        int64_t dm_val = Utils::LowHighTo64Bits(get_register(rd),
-                                                get_register(rn));
+        int64_t dm_val =
+            Utils::LowHighTo64Bits(get_register(rd), get_register(rn));
         set_dregister_bits(dm, dm_val);
       }
     }
-  } else if (instr-> IsVFPLoadStore()) {
+  } else if (instr->IsVFPLoadStore()) {
     Register rn = instr->RnField();
     int32_t addr = get_register(rn);
     int32_t imm_val = instr->Bits(0, 8) << 2;
     if (instr->Bit(23) == 1) {
       addr += imm_val;
     } else {
       addr -= imm_val;
     }
     if (IsIllegalAddress(addr)) {
       HandleIllegalAccess(addr, instr);
@@ skipping 178 matching lines @@
             if (instr->Bit(6) == 0) {
               // Format(instr, "vaddd'cond 'dd, 'dn, 'dm");
               set_dregister(dd, get_dregister(dn) + get_dregister(dm));
             } else {
               // Format(instr, "vsubd'cond 'dd, 'dn, 'dm");
               set_dregister(dd, get_dregister(dn) - get_dregister(dm));
             }
           }
           break;
         }
-        case 0xb: {  // Other VFP data-processing instructions
+        case 0xb: {                  // Other VFP data-processing instructions
           if (instr->Bit(6) == 0) {  // vmov immediate
             if (instr->Bit(8) == 0) {
               // Format(instr, "vmovs'cond 'sd, #'immf");
               set_sregister(sd, instr->ImmFloatField());
             } else {
               // Format(instr, "vmovd'cond 'dd, #'immd");
               set_dregister(dd, instr->ImmDoubleField());
             }
             break;
           }
@@ skipping 49 matching lines @@
                   }
                   break;
                 }
                 default: {
                   UnimplementedInstruction(instr);
                   break;
                 }
               }
               break;
             }
-            case 4:  // vcmp, vcmpe
-            case 5: {  // vcmp #0.0, vcmpe #0.0
+            case 4:                      // vcmp, vcmpe
+            case 5: {                    // vcmp #0.0, vcmpe #0.0
               if (instr->Bit(7) == 1) {  // vcmpe
                 UnimplementedInstruction(instr);
               } else {
                 fp_n_flag_ = false;
                 fp_z_flag_ = false;
                 fp_c_flag_ = false;
                 fp_v_flag_ = false;
                 if (instr->Bit(8) == 0) {  // vcmps
                   float sd_val = get_sregister(sd);
                   float sm_val;
@@ skipping 142 matching lines @@
               }
               int32_t sd_val;
               if (instr->Bit(16) == 0) {
                 sd_val = static_cast<int32_t>(ud_val);
               } else {
                 sd_val = id_val;
               }
               set_sregister_bits(sd, sd_val);
               break;
             }
-            case 2:  // vcvtb, vcvtt
-            case 3:  // vcvtb, vcvtt
-            case 9:  // undefined
+            case 2:   // vcvtb, vcvtt
+            case 3:   // vcvtb, vcvtt
+            case 9:   // undefined
             case 10:  // vcvt between floating-point and fixed-point
             case 11:  // vcvt between floating-point and fixed-point
             case 14:  // vcvt between floating-point and fixed-point
             case 15:  // vcvt between floating-point and fixed-point
             default: {
               UnimplementedInstruction(instr);
               break;
             }
           }
-        }
-        break;
+        } break;
       }
     } else {
       // 8, 16, or 32-bit Transfer between ARM Core and VFP
       if ((instr->Bits(21, 3) == 0) && (instr->Bit(8) == 0)) {
         Register rd = instr->RdField();
         SRegister sn = instr->SnField();
         if (instr->Bit(20) == 0) {
           // Format(instr, "vmovs'cond 'sn, 'rd");
           set_sregister_bits(sn, get_register(rd));
         } else {
@@ skipping 33 matching lines @@
       }
     }
   } else {
     UnimplementedInstruction(instr);
   }
 }
 
 
 static float arm_reciprocal_sqrt_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-87.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   uint64_t scaled;
   if (((a_bits >> 23) & 1) != 0) {
     // scaled = '0 01111111101' : operand<22:0> : Zeros(29)
     scaled = (static_cast<uint64_t>(0x3fd) << 52) |
              ((static_cast<uint64_t>(a_bits) & 0x7fffff) << 29);
   } else {
     // scaled = '0 01111111110' : operand<22:0> : Zeros(29)
     scaled = (static_cast<uint64_t>(0x3fe) << 52) |
@@ skipping 17 matching lines @@
     // range 0.5 <= a < 1.0
 
     // a in units of 1/256 rounded down.
     int32_t q1 = static_cast<int32_t>(scaled_d * 256.0);
     // reciprocal root r.
     r = 1.0 / sqrt((static_cast<double>(q1) + 0.5) / 256.0);
   }
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = 0 : result_exp<7:0> : estimate<51:29>
-  int32_t result_bits = ((result_exp & 0xff) << 23) |
+  int32_t result_bits =
+      ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 static float arm_recip_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-85.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   // scaled = '0011 1111 1110' : a<22:0> : Zeros(29)
   uint64_t scaled = (static_cast<uint64_t>(0x3fe) << 52) |
                     ((static_cast<uint64_t>(a_bits) & 0x7fffff) << 29);
   // result_exp = 253 - UInt(a<30:23>)
   int32_t result_exp = 253 - ((a_bits >> 23) & 0xff);
   ASSERT((result_exp >= 1) && (result_exp <= 252));
 
   double scaled_d = bit_cast<double, uint64_t>(scaled);
   ASSERT((scaled_d >= 0.5) && (scaled_d < 1.0));
 
   // a in units of 1/512 rounded down.
   int32_t q = static_cast<int32_t>(scaled_d * 512.0);
   // reciprocal r.
   double r = 1.0 / ((static_cast<double>(q) + 0.5) / 512.0);
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int32_t>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = sign : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
       (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
-static void simd_value_swap(simd_value_t* s1, int i1,
-                            simd_value_t* s2, int i2) {
+static void simd_value_swap(simd_value_t* s1,
+                            int i1,
+                            simd_value_t* s2,
+                            int i2) {
   uint32_t tmp;
   tmp = s1->data_[i1].u;
   s1->data_[i1].u = s2->data_[i2].u;
   s2->data_[i2].u = tmp;
 }
 
 
 void Simulator::DecodeSIMDDataProcessing(Instr* instr) {
   ASSERT(instr->ConditionField() == kSpecialCondition);
 
@@ skipping 220 matching lines @@
       // Format(instr, "vminqs 'qd, 'qn, 'qm");
       for (int i = 0; i < 4; i++) {
         s8d.data_[i].f =
             s8n.data_[i].f <= s8m.data_[i].f ? s8n.data_[i].f : s8m.data_[i].f;
       }
     } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) &&
                (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) {
       // Format(instr, "vmaxqs 'qd, 'qn, 'qm");
       for (int i = 0; i < 4; i++) {
         s8d.data_[i].f =
-          s8n.data_[i].f >= s8m.data_[i].f ? s8n.data_[i].f : s8m.data_[i].f;
+            s8n.data_[i].f >= s8m.data_[i].f ? s8n.data_[i].f : s8m.data_[i].f;
       }
     } else if ((instr->Bits(8, 4) == 7) && (instr->Bit(4) == 0) &&
                (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
                (instr->Bit(7) == 0) && (instr->Bits(16, 4) == 9)) {
       // Format(instr, "vabsqs 'qd, 'qm");
       for (int i = 0; i < 4; i++) {
         s8d.data_[i].f = fabsf(s8m.data_[i].f);
       }
     } else if ((instr->Bits(8, 4) == 7) && (instr->Bit(4) == 0) &&
                (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
@@ skipping 542 matching lines @@
   set_register(THR, reinterpret_cast<uword>(thread));
   // Set the tag.
   thread->set_vm_tag(VMTag::kDartTagId);
   // Clear top exit frame.
   thread->set_top_exit_frame_info(0);
 
   ASSERT(raw_exception != Object::null());
   set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception));
   set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
   // Restore pool pointer.
-  int32_t code = *reinterpret_cast<int32_t*>(
-      fp + kPcMarkerSlotFromFp * kWordSize);
-  int32_t pp = *reinterpret_cast<int32_t*>(
-      code + Code::object_pool_offset() - kHeapObjectTag);
+  int32_t code =
+      *reinterpret_cast<int32_t*>(fp + kPcMarkerSlotFromFp * kWordSize);
+  int32_t pp = *reinterpret_cast<int32_t*>(code + Code::object_pool_offset() -
+                                           kHeapObjectTag);
   set_register(CODE_REG, code);
   set_register(PP, pp);
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // defined(USING_SIMULATOR)
 
 #endif  // defined TARGET_ARCH_ARM