clang-format runtime/vm

runtime/vm/assembler_arm_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/os.h"
@@ skipping 90 matching lines @@
   __ LoadHalfWordUnaligned(R1, R0, TMP);
   __ mov(R0, Operand(R1));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(LoadHalfWordUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*LoadHalfWordUnaligned)(intptr_t) DART_UNUSED;
   uint8_t buffer[4] = {
-    0x89, 0xAB, 0xCD, 0xEF,
+      0x89, 0xAB, 0xCD, 0xEF,
   };
 
-  EXPECT_EQ(static_cast<int16_t>(static_cast<uint16_t>(0xAB89)),
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadHalfWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
-  EXPECT_EQ(static_cast<int16_t>(static_cast<uint16_t>(0xCDAB)),
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadHalfWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(
+      static_cast<int16_t>(static_cast<uint16_t>(0xAB89)),
+      EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadHalfWordUnaligned, test->entry(),
+                                      reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(
+      static_cast<int16_t>(static_cast<uint16_t>(0xCDAB)),
+      EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadHalfWordUnaligned, test->entry(),
+                                      reinterpret_cast<intptr_t>(&buffer[1])));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadHalfWordUnsignedUnaligned, assembler) {
   __ LoadHalfWordUnsignedUnaligned(R1, R0, TMP);
   __ mov(R0, Operand(R1));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(LoadHalfWordUnsignedUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*LoadHalfWordUnsignedUnaligned)(intptr_t) DART_UNUSED;
   uint8_t buffer[4] = {
-    0x89, 0xAB, 0xCD, 0xEF,
+      0x89, 0xAB, 0xCD, 0xEF,
   };
 
-  EXPECT_EQ(0xAB89,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadHalfWordUnsignedUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
-  EXPECT_EQ(0xCDAB,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadHalfWordUnsignedUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(0xAB89, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                        LoadHalfWordUnsignedUnaligned, test->entry(),
+                        reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(0xCDAB, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                        LoadHalfWordUnsignedUnaligned, test->entry(),
+                        reinterpret_cast<intptr_t>(&buffer[1])));
 }
 
 
 ASSEMBLER_TEST_GENERATE(StoreHalfWordUnaligned, assembler) {
   __ LoadImmediate(R1, 0xABCD);
   __ StoreWordUnaligned(R1, R0, TMP);
   __ mov(R0, Operand(R1));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(StoreHalfWordUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*StoreHalfWordUnaligned)(intptr_t) DART_UNUSED;
   uint8_t buffer[4] = {
-    0, 0, 0, 0,
+      0, 0, 0, 0,
   };
 
-  EXPECT_EQ(0xABCD,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreHalfWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(0xABCD, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                        StoreHalfWordUnaligned, test->entry(),
+                        reinterpret_cast<intptr_t>(&buffer[0])));
   EXPECT_EQ(0xCD, buffer[0]);
   EXPECT_EQ(0xAB, buffer[1]);
   EXPECT_EQ(0, buffer[2]);
 
-  EXPECT_EQ(0xABCD,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreHalfWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(0xABCD, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                        StoreHalfWordUnaligned, test->entry(),
+                        reinterpret_cast<intptr_t>(&buffer[1])));
   EXPECT_EQ(0xCD, buffer[1]);
   EXPECT_EQ(0xAB, buffer[2]);
   EXPECT_EQ(0, buffer[3]);
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadWordUnaligned, assembler) {
   __ LoadWordUnaligned(R1, R0, TMP);
   __ mov(R0, Operand(R1));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(LoadWordUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*LoadWordUnaligned)(intptr_t) DART_UNUSED;
-  uint8_t buffer[8] = {
-    0x12, 0x34, 0x56, 0x78,
-    0x9A, 0xBC, 0xDE, 0xF0
-  };
+  uint8_t buffer[8] = {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0};
 
-  EXPECT_EQ(0x78563412,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
-  EXPECT_EQ(0x9A785634,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
-  EXPECT_EQ(0xBC9A7856,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[2])));
-  EXPECT_EQ(0xDEBC9A78,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[3])));
+  EXPECT_EQ(0x78563412, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            LoadWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(0x9A785634, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            LoadWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(0xBC9A7856, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            LoadWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[2])));
+  EXPECT_EQ(0xDEBC9A78, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            LoadWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[3])));
 }
 
 
 ASSEMBLER_TEST_GENERATE(StoreWordUnaligned, assembler) {
   __ LoadImmediate(R1, 0x12345678);
   __ StoreWordUnaligned(R1, R0, TMP);
   __ mov(R0, Operand(R1));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(StoreWordUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*StoreWordUnaligned)(intptr_t) DART_UNUSED;
-  uint8_t buffer[8] = {
-    0, 0, 0, 0,
-    0, 0, 0, 0
-  };
+  uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
 
-  EXPECT_EQ(0x12345678,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            StoreWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[0])));
   EXPECT_EQ(0x78, buffer[0]);
   EXPECT_EQ(0x56, buffer[1]);
   EXPECT_EQ(0x34, buffer[2]);
   EXPECT_EQ(0x12, buffer[3]);
 
-  EXPECT_EQ(0x12345678,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            StoreWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[1])));
   EXPECT_EQ(0x78, buffer[1]);
   EXPECT_EQ(0x56, buffer[2]);
   EXPECT_EQ(0x34, buffer[3]);
   EXPECT_EQ(0x12, buffer[4]);
 
-  EXPECT_EQ(0x12345678,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[2])));
+  EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            StoreWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[2])));
   EXPECT_EQ(0x78, buffer[2]);
   EXPECT_EQ(0x56, buffer[3]);
   EXPECT_EQ(0x34, buffer[4]);
   EXPECT_EQ(0x12, buffer[5]);
 
-  EXPECT_EQ(0x12345678,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[3])));
+  EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            StoreWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[3])));
   EXPECT_EQ(0x78, buffer[3]);
   EXPECT_EQ(0x56, buffer[4]);
   EXPECT_EQ(0x34, buffer[5]);
   EXPECT_EQ(0x12, buffer[6]);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmov, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ mov(R3, Operand(43));
     __ mov(R1, Operand(41));
-    __ vmovsrr(S1, R1, R3);  // S1:S2 = 41:43
-    __ vmovs(S0, S2);  // S0 = S2, S0:S1 == 43:41
-    __ vmovd(D2, D0);  // D2 = D0, S4:S5 == 43:41
-    __ vmovrs(R3, S5);  // R3 = S5, R3 == 41
-    __ vmovrrs(R1, R2, S4);  // R1:R2 = S4:S5, R1:R2 == 43:41
-    __ vmovdrr(D3, R3, R2);  // D3 = R3:R2, S6:S7 == 41:41
-    __ vmovdr(D3, 1, R1);  // D3[1] == S7 = R1, S6:S7 == 41:43
-    __ vmovrrd(R0, R1, D3);  // R0:R1 = D3, R0:R1 == 41:43
+    __ vmovsrr(S1, R1, R3);       // S1:S2 = 41:43
+    __ vmovs(S0, S2);             // S0 = S2, S0:S1 == 43:41
+    __ vmovd(D2, D0);             // D2 = D0, S4:S5 == 43:41
+    __ vmovrs(R3, S5);            // R3 = S5, R3 == 41
+    __ vmovrrs(R1, R2, S4);       // R1:R2 = S4:S5, R1:R2 == 43:41
+    __ vmovdrr(D3, R3, R2);       // D3 = R3:R2, S6:S7 == 41:41
+    __ vmovdr(D3, 1, R1);         // D3[1] == S7 = R1, S6:S7 == 41:43
+    __ vmovrrd(R0, R1, D3);       // R0:R1 = D3, R0:R1 == 41:43
     __ sub(R0, R1, Operand(R0));  // 43-41
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vmov, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef int (*Vmov)() DART_UNUSED;
@@ skipping 14 matching lines @@
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SingleVLoadStore, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef float (*SingleVLoadStore)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(SingleVLoadStore, test->entry());
-    EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
+    EXPECT_FLOAT_EQ(2 * 12.3f, res, 0.001f);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(SingleVShiftLoadStore, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadImmediate(R0, bit_cast<int32_t, float>(12.3f));
     __ mov(R2, Operand(SP));
     // Expressing __str(R0, Address(SP, (-kWordSize * 32), Address::PreIndex));
     // as:
     __ mov(R1, Operand(kWordSize));
     __ str(R0, Address(SP, R1, LSL, 5, Address::NegPreIndex));
     __ vldrs(S0, Address(R2, (-kWordSize * 32)));
     __ vadds(S0, S0, S0);
     __ vstrs(S0, Address(R2, (-kWordSize * 32)));
     // Expressing __ldr(R0, Address(SP, (kWordSize * 32), Address::PostIndex));
     // as:
     __ ldr(R0, Address(SP, R1, LSL, 5, Address::PostIndex));
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SingleVShiftLoadStore, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef float (*SingleVLoadStore)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(SingleVLoadStore, test->entry());
-    EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
+    EXPECT_FLOAT_EQ(2 * 12.3f, res, 0.001f);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleVLoadStore, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     int64_t value = bit_cast<int64_t, double>(12.3);
     __ LoadImmediate(R0, Utils::Low32Bits(value));
     __ LoadImmediate(R1, Utils::High32Bits(value));
     __ mov(R2, Operand(SP));
     __ str(R0, Address(SP, (-kWordSize * 30), Address::PreIndex));
     __ str(R1, Address(R2, (-kWordSize * 29)));
     __ vldrd(D0, Address(R2, (-kWordSize * 30)));
     __ vaddd(D0, D0, D0);
     __ vstrd(D0, Address(R2, (-kWordSize * 30)));
     __ ldr(R1, Address(R2, (-kWordSize * 29)));
     __ ldr(R0, Address(SP, (kWordSize * 30), Address::PostIndex));
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleVLoadStore, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef double (*DoubleVLoadStore)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_DOUBLE(DoubleVLoadStore, test->entry());
-    EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
+    EXPECT_FLOAT_EQ(2 * 12.3f, res, 0.001f);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(SingleFPOperations, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadSImmediate(S0, 12.3f);
     __ LoadSImmediate(S1, 3.4f);
-    __ vnegs(S0, S0);  // -12.3f
-    __ vabss(S0, S0);  // 12.3f
+    __ vnegs(S0, S0);      // -12.3f
+    __ vabss(S0, S0);      // 12.3f
     __ vadds(S0, S0, S1);  // 15.7f
     __ vmuls(S0, S0, S1);  // 53.38f
     __ vsubs(S0, S0, S1);  // 49.98f
     __ vdivs(S0, S0, S1);  // 14.7f
-    __ vsqrts(S0, S0);  // 3.8340579f
+    __ vsqrts(S0, S0);     // 3.8340579f
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SingleFPOperations, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef float (*SingleFPOperations)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(SingleFPOperations, test->entry());
     EXPECT_FLOAT_EQ(3.8340579f, res, 0.001f);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleFPOperations, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadDImmediate(D0, 12.3, R0);
     __ LoadDImmediate(D1, 3.4, R0);
-    __ vnegd(D0, D0);  // -12.3
-    __ vabsd(D0, D0);  // 12.3
+    __ vnegd(D0, D0);      // -12.3
+    __ vabsd(D0, D0);      // 12.3
     __ vaddd(D0, D0, D1);  // 15.7
     __ vmuld(D0, D0, D1);  // 53.38
     __ vsubd(D0, D0, D1);  // 49.98
     __ vdivd(D0, D0, D1);  // 14.7
-    __ vsqrtd(D0, D0);  // 3.8340579
+    __ vsqrtd(D0, D0);     // 3.8340579
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleFPOperations, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef double (*DoubleFPOperations)() DART_UNUSED;
     double res = EXECUTE_TEST_CODE_DOUBLE(DoubleFPOperations, test->entry());
@@ skipping 32 matching lines @@
     __ vcvtdi(D0, S3);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(IntToDoubleConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef double (*IntToDoubleConversionCode)() DART_UNUSED;
-    double res = EXECUTE_TEST_CODE_DOUBLE(IntToDoubleConversionCode,
-                                          test->entry());
+    double res =
+        EXECUTE_TEST_CODE_DOUBLE(IntToDoubleConversionCode, test->entry());
     EXPECT_FLOAT_EQ(6.0, res, 0.001);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(LongToDoubleConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     int64_t value = 60000000000LL;
     __ LoadImmediate(R0, Utils::Low32Bits(value));
     __ LoadImmediate(R1, Utils::High32Bits(value));
     __ vmovsr(S0, R0);
     __ vmovsr(S2, R1);
     __ vcvtdu(D0, S0);
     __ vcvtdi(D1, S2);
     __ LoadDImmediate(D2, 1.0 * (1LL << 32), R0);
     __ vmlad(D0, D1, D2);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(LongToDoubleConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef double (*LongToDoubleConversionCode)() DART_UNUSED;
-    double res = EXECUTE_TEST_CODE_DOUBLE(LongToDoubleConversionCode,
-                                          test->entry());
+    double res =
+        EXECUTE_TEST_CODE_DOUBLE(LongToDoubleConversionCode, test->entry());
     EXPECT_FLOAT_EQ(60000000000.0, res, 0.001);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(IntToFloatConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ mov(R3, Operand(6));
     __ vmovsr(S3, R3);
     __ vcvtsi(S0, S3);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(IntToFloatConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef float (*IntToFloatConversionCode)() DART_UNUSED;
-    float res = EXECUTE_TEST_CODE_FLOAT(IntToFloatConversionCode,
-                                        test->entry());
+    float res =
+        EXECUTE_TEST_CODE_FLOAT(IntToFloatConversionCode, test->entry());
     EXPECT_FLOAT_EQ(6.0, res, 0.001);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(FloatToIntConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ vcvtis(S1, S0);
     __ vmovrs(R0, S1);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(FloatToIntConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef int (*FloatToIntConversion)(float arg) DART_UNUSED;
-    EXPECT_EQ(12,
-              EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
-                                        12.8f));
-    EXPECT_EQ(INT_MIN,
-              EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
-                                        -FLT_MAX));
-    EXPECT_EQ(INT_MAX,
-              EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
-                                        FLT_MAX));
+    EXPECT_EQ(12, EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
+                                            12.8f));
+    EXPECT_EQ(INT_MIN, EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion,
+                                                 test->entry(), -FLT_MAX));
+    EXPECT_EQ(INT_MAX, EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion,
+                                                 test->entry(), FLT_MAX));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleToIntConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ vcvtid(S0, D0);
     __ vmovrs(R0, S0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleToIntConversion, test) {
   if (TargetCPUFeatures::vfp_supported()) {
     typedef int (*DoubleToIntConversion)(double arg) DART_UNUSED;
     EXPECT(test != NULL);
-    EXPECT_EQ(12,
-              EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
-                                        12.8));
-    EXPECT_EQ(INT_MIN,
-              EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
-                                        -DBL_MAX));
-    EXPECT_EQ(INT_MAX,
-              EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
-                                        DBL_MAX));
+    EXPECT_EQ(12, EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion,
+                                            test->entry(), 12.8));
+    EXPECT_EQ(INT_MIN, EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion,
+                                                 test->entry(), -DBL_MAX));
+    EXPECT_EQ(INT_MAX, EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion,
+                                                 test->entry(), DBL_MAX));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(FloatToDoubleConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadSImmediate(S2, 12.8f);
     __ vcvtds(D0, S2);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(FloatToDoubleConversion, test) {
   if (TargetCPUFeatures::vfp_supported()) {
     typedef double (*FloatToDoubleConversionCode)() DART_UNUSED;
     EXPECT(test != NULL);
-    double res = EXECUTE_TEST_CODE_DOUBLE(FloatToDoubleConversionCode,
-                                          test->entry());
+    double res =
+        EXECUTE_TEST_CODE_DOUBLE(FloatToDoubleConversionCode, test->entry());
     EXPECT_FLOAT_EQ(12.8, res, 0.001);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleToFloatConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadDImmediate(D1, 12.8, R0);
     __ vcvtsd(S0, D1);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleToFloatConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
     typedef float (*DoubleToFloatConversionCode)() DART_UNUSED;
-    float res = EXECUTE_TEST_CODE_FLOAT(DoubleToFloatConversionCode,
-                                        test->entry());
+    float res =
+        EXECUTE_TEST_CODE_FLOAT(DoubleToFloatConversionCode, test->entry());
     EXPECT_FLOAT_EQ(12.8, res, 0.001);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(FloatCompare, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     // Test 12.3f vs 12.5f.
     __ LoadSImmediate(S0, 12.3f);
     __ LoadSImmediate(S1, 12.5f);
@@ skipping 166 matching lines @@
   if (TargetCPUFeatures::arm_version() != ARMv5TE) {
     __ mov(R0, Operand(40));
     __ mov(R1, Operand(42));
     __ Push(R0);
     Label retry;
     __ Bind(&retry);
     __ ldrex(R0, SP);
     __ strex(IP, R1, SP);  // IP == 0, success
     __ tst(IP, Operand(0));
     __ b(&retry, NE);  // NE if context switch occurred between ldrex and strex.
-    __ Pop(R0);  // 42
+    __ Pop(R0);        // 42
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Semaphore, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::arm_version() != ARMv5TE) {
     typedef int (*Semaphore)() DART_UNUSED;
     EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(FailedSemaphore, assembler) {
   if (TargetCPUFeatures::arm_version() != ARMv5TE) {
     __ mov(R0, Operand(40));
     __ mov(R1, Operand(42));
     __ Push(R0);
     __ ldrex(R0, SP);
-    __ clrex();  // Simulate a context switch.
+    __ clrex();            // Simulate a context switch.
     __ strex(IP, R1, SP);  // IP == 1, failure
-    __ Pop(R0);  // 40
+    __ Pop(R0);            // 40
     __ add(R0, R0, Operand(IP));
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(FailedSemaphore, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::arm_version() != ARMv5TE) {
     typedef int (*FailedSemaphore)() DART_UNUSED;
@@ skipping 35 matching lines @@
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(AddCarry, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddCarryInOut, assembler) {
   __ LoadImmediate(R2, 0xFFFFFFFF);
   __ mov(R1, Operand(1));
   __ mov(R0, Operand(0));
   __ adds(IP, R2, Operand(R1));  // c_out = 1.
   __ adcs(IP, R2, Operand(R0));  // c_in = 1, c_out = 1.
-  __ adc(R0, R0, Operand(R0));  // c_in = 1.
+  __ adc(R0, R0, Operand(R0));   // c_in = 1.
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddCarryInOut, test) {
   EXPECT(test != NULL);
   typedef int (*AddCarryInOut)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(AddCarryInOut, test->entry()));
 }
 
@@ skipping 13 matching lines @@
   typedef int (*SubCarry)() DART_UNUSED;
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SubCarry, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(SubCarryInOut, assembler) {
   __ mov(R1, Operand(1));
   __ mov(R0, Operand(0));
   __ subs(IP, R0, Operand(R1));  // c_out = 1.
   __ sbcs(IP, R0, Operand(R0));  // c_in = 1, c_out = 1.
-  __ sbc(R0, R0, Operand(R0));  // c_in = 1.
+  __ sbc(R0, R0, Operand(R0));   // c_in = 1.
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SubCarryInOut, test) {
   EXPECT(test != NULL);
   typedef int (*SubCarryInOut)() DART_UNUSED;
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SubCarryInOut, test->entry()));
 }
 
@@ skipping 27 matching lines @@
 
 ASSEMBLER_TEST_RUN(AndOrr, test) {
   EXPECT(test != NULL);
   typedef int (*AndOrr)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(AndOrr, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Orrs, assembler) {
   __ mov(R0, Operand(0));
-  __ tst(R0, Operand(R1));  // Set zero-flag.
+  __ tst(R0, Operand(R1));      // Set zero-flag.
   __ orrs(R0, R0, Operand(1));  // Clear zero-flag.
   __ bx(LR, EQ);
   __ mov(R0, Operand(42));
   __ bx(LR, NE);  // Only this return should fire.
   __ mov(R0, Operand(2));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Orrs, test) {
@@ skipping 20 matching lines @@
 
 
 ASSEMBLER_TEST_GENERATE(QuotientRemainder, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ vmovsr(S2, R0);
     __ vmovsr(S4, R2);
     __ vcvtdi(D1, S2);
     __ vcvtdi(D2, S4);
     __ vdivd(D0, D1, D2);
     __ vcvtid(S0, D0);
-    __ vmovrs(R1, S0);  // r1 = r0/r2
+    __ vmovrs(R1, S0);       // r1 = r0/r2
     __ mls(R0, R1, R2, R0);  // r0 = r0 - r1*r2
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(QuotientRemainder, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef int64_t (*QuotientRemainder)
-        (int64_t dividend, int64_t divisor) DART_UNUSED;
+    typedef int64_t (*QuotientRemainder)(int64_t dividend, int64_t divisor)
+        DART_UNUSED;
     EXPECT_EQ(0x1000400000da8LL,
               EXECUTE_TEST_CODE_INT64_LL(QuotientRemainder, test->entry(),
                                          0x12345678, 0x1234));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Multiply64To64, assembler) {
   __ Push(R4);
   __ mov(IP, Operand(R0));
   __ mul(R4, R2, R1);
   __ umull(R0, R1, R2, IP);
   __ mla(R2, IP, R3, R4);
   __ add(R1, R2, Operand(R1));
   __ Pop(R4);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Multiply64To64, test) {
   EXPECT(test != NULL);
-  typedef int64_t (*Multiply64To64)
-      (int64_t operand0, int64_t operand1) DART_UNUSED;
+  typedef int64_t (*Multiply64To64)(int64_t operand0, int64_t operand1)
+      DART_UNUSED;
   EXPECT_EQ(6,
             EXECUTE_TEST_CODE_INT64_LL(Multiply64To64, test->entry(), -3, -2));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Multiply32To64, assembler) {
   __ smull(R0, R1, R0, R2);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Multiply32To64, test) {
   EXPECT(test != NULL);
-  typedef int64_t (*Multiply32To64)
-      (int64_t operand0, int64_t operand1) DART_UNUSED;
+  typedef int64_t (*Multiply32To64)(int64_t operand0, int64_t operand1)
+      DART_UNUSED;
   EXPECT_EQ(6,
             EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2));
 }
 
 
 ASSEMBLER_TEST_GENERATE(MultiplyAccumAccum32To64, assembler) {
   __ umaal(R0, R1, R2, R3);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(MultiplyAccumAccum32To64, test) {
   EXPECT(test != NULL);
-  typedef int64_t (*MultiplyAccumAccum32To64)
-      (int64_t operand0, int64_t operand1) DART_UNUSED;
+  typedef int64_t (*MultiplyAccumAccum32To64)(int64_t operand0,
+                                              int64_t operand1) DART_UNUSED;
   EXPECT_EQ(3 + 7 + 5 * 11,
             EXECUTE_TEST_CODE_INT64_LL(MultiplyAccumAccum32To64, test->entry(),
                                        (3LL << 32) + 7, (5LL << 32) + 11));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Clz, assembler) {
   Label error;
 
   __ mov(R0, Operand(0));
@@ skipping 240 matching lines @@
 
 ASSEMBLER_TEST_RUN(Ldrh1, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0xff, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldrd, assembler) {
   __ mov(IP, Operand(SP));
-  __ sub(SP, SP, Operand(kWordSize*30));
+  __ sub(SP, SP, Operand(kWordSize * 30));
   __ strd(R2, R3, SP, 0);
-  __ strd(R0, R1, IP, (-kWordSize*28));
-  __ ldrd(R2, R3, IP, (-kWordSize*28));
+  __ strd(R0, R1, IP, (-kWordSize * 28));
+  __ ldrd(R2, R3, IP, (-kWordSize * 28));
   __ ldrd(R0, R1, SP, 0);
-  __ add(SP, SP, Operand(kWordSize*30));
+  __ add(SP, SP, Operand(kWordSize * 30));
   __ sub(R0, R0, Operand(R2));
   __ add(R1, R1, Operand(R3));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldrd, test) {
   EXPECT(test != NULL);
   typedef int64_t (*Tst)(int64_t r0r1, int64_t r2r3) DART_UNUSED;
-  EXPECT_EQ(0x0000444400002222LL, EXECUTE_TEST_CODE_INT64_LL(
-      Tst, test->entry(), 0x0000111100000000LL, 0x0000333300002222LL));
+  EXPECT_EQ(0x0000444400002222LL,
+            EXECUTE_TEST_CODE_INT64_LL(Tst, test->entry(), 0x0000111100000000LL,
+                                       0x0000333300002222LL));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldm_stm_da, assembler) {
   __ mov(R0, Operand(1));
   __ mov(R1, Operand(7));
   __ mov(R2, Operand(11));
   __ mov(R3, Operand(31));
   __ Push(R9);  // We use R9 as accumulator.
   __ Push(R9);
   __ Push(R9);
   __ Push(R9);
   __ Push(R9);
   __ Push(R0);  // Make room, so we can decrement after.
   __ stm(DA_W, SP, (1 << R0 | 1 << R1 | 1 << R2 | 1 << R3));
   __ str(R2, Address(SP));                 // Should be a free slot.
   __ ldr(R9, Address(SP, 1 * kWordSize));  // R0.  R9 = +1.
   __ ldr(IP, Address(SP, 2 * kWordSize));  // R1.
-  __ sub(R9, R9, Operand(IP));      // -R1. R9 = -6.
+  __ sub(R9, R9, Operand(IP));             // -R1. R9 = -6.
   __ ldr(IP, Address(SP, 3 * kWordSize));  // R2.
-  __ add(R9, R9, Operand(IP));      // +R2. R9 = +5.
+  __ add(R9, R9, Operand(IP));             // +R2. R9 = +5.
   __ ldr(IP, Address(SP, 4 * kWordSize));  // R3.
-  __ sub(R9, R9, Operand(IP));      // -R3. R9 = -26.
+  __ sub(R9, R9, Operand(IP));             // -R3. R9 = -26.
   __ ldm(IB_W, SP, (1 << R0 | 1 << R1 | 1 << R2 | 1 << R3));
   // Same operations again. But this time from the restore registers.
   __ add(R9, R9, Operand(R0));
   __ sub(R9, R9, Operand(R1));
   __ add(R9, R9, Operand(R2));
   __ sub(R0, R9, Operand(R3));  // R0 = result = -52.
-  __ Pop(R1);  // Remove storage slot.
-  __ Pop(R9);  // Restore R9.
-  __ Pop(R9);  // Restore R9.
-  __ Pop(R9);  // Restore R9.
-  __ Pop(R9);  // Restore R9.
-  __ Pop(R9);  // Restore R9.
+  __ Pop(R1);                   // Remove storage slot.
+  __ Pop(R9);                   // Restore R9.
+  __ Pop(R9);                   // Restore R9.
+  __ Pop(R9);                   // Restore R9.
+  __ Pop(R9);                   // Restore R9.
+  __ Pop(R9);                   // Restore R9.
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldm_stm_da, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-52, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
@@ skipping 1758 matching lines @@
   if (TargetCPUFeatures::neon_supported()) {
     typedef int (*Tst)() DART_UNUSED;
     EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmvnq, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadImmediate(R1, 42);  // R1 <- 42.
-    __ vmovsr(S2, R1);  // S2 <- R1.
-    __ vmvnq(Q1, Q0);  // Q1 <- ~Q0.
-    __ vmvnq(Q2, Q1);  // Q2 <- ~Q1.
-    __ vmovrs(R0, S10);  // Now R0 should be 42 again.
+    __ vmovsr(S2, R1);         // S2 <- R1.
+    __ vmvnq(Q1, Q0);          // Q1 <- ~Q0.
+    __ vmvnq(Q2, Q1);          // Q2 <- ~Q1.
+    __ vmovrs(R0, S10);        // Now R0 should be 42 again.
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vmvnq, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::neon_supported()) {
     typedef int (*Tst)() DART_UNUSED;
     EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
@@ skipping 514 matching lines @@
   if (TargetCPUFeatures::neon_supported()) {
     typedef int (*Tst)() DART_UNUSED;
     EXPECT_EQ(14, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
   }
 }
 
 
 // This is the same function as in the Simulator.
 static float arm_recip_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-85.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   // scaled = '0011 1111 1110' : a<22:0> : Zeros(29)
   uint64_t scaled = (static_cast<uint64_t>(0x3fe) << 52) |
                     ((static_cast<uint64_t>(a_bits) & 0x7fffff) << 29);
   // result_exp = 253 - UInt(a<30:23>)
   int32_t result_exp = 253 - ((a_bits >> 23) & 0xff);
   ASSERT((result_exp >= 1) && (result_exp <= 252));
 
   double scaled_d = bit_cast<double, uint64_t>(scaled);
   ASSERT((scaled_d >= 0.5) && (scaled_d < 1.0));
 
   // a in units of 1/512 rounded down.
   int32_t q = static_cast<int32_t>(scaled_d * 512.0);
   // reciprocal r.
   double r = 1.0 / ((static_cast<double>(q) + 0.5) / 512.0);
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int32_t>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = sign : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
       (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrecpeqs, assembler) {
@@ skipping 63 matching lines @@
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Reciprocal, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::neon_supported()) {
     typedef float (*Reciprocal)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(Reciprocal, test->entry());
-    EXPECT_FLOAT_EQ(1.0/147000.0, res, 0.0001f);
+    EXPECT_FLOAT_EQ(1.0 / 147000.0, res, 0.0001f);
   }
 }
 
 
 static float arm_reciprocal_sqrt_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-87.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   uint64_t scaled;
   if (((a_bits >> 23) & 1) != 0) {
     // scaled = '0 01111111101' : operand<22:0> : Zeros(29)
     scaled = (static_cast<uint64_t>(0x3fd) << 52) |
              ((static_cast<uint64_t>(a_bits) & 0x7fffff) << 29);
   } else {
     // scaled = '0 01111111110' : operand<22:0> : Zeros(29)
     scaled = (static_cast<uint64_t>(0x3fe) << 52) |
@@ skipping 17 matching lines @@
     // range 0.5 <= a < 1.0
 
     // a in units of 1/256 rounded down.
     int32_t q1 = static_cast<int32_t>(scaled_d * 256.0);
     // reciprocal root r.
     r = 1.0 / sqrt((static_cast<double>(q1) + 0.5) / 256.0);
   }
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = 0 : result_exp<7:0> : estimate<51:29>
-  int32_t result_bits = ((result_exp & 0xff) << 23) |
+  int32_t result_bits =
+      ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrsqrteqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
@@ skipping 31 matching lines @@
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrtsqs, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::neon_supported()) {
     typedef float (*Vrsqrtsqs)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrtsqs, test->entry());
-    EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001f);
+    EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0) / 2.0, res, 0.0001f);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(ReciprocalSqrt, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
-    __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
+    __ vmulqs(Q2, Q0, Q0);     // Q2 <- xn^2
     __ vrsqrtsqs(Q2, Q1, Q2);  // Q2 <- (3 - Q1*Q2) / 2.
-    __ vmulqs(Q0, Q0, Q2);  // xn+1 <- xn * Q2
+    __ vmulqs(Q0, Q0, Q2);     // xn+1 <- xn * Q2
     // Second step.
     __ vmulqs(Q2, Q0, Q0);
     __ vrsqrtsqs(Q2, Q1, Q2);
     __ vmulqs(Q0, Q0, Q2);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(ReciprocalSqrt, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::neon_supported()) {
     typedef float (*ReciprocalSqrt)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(ReciprocalSqrt, test->entry());
-    EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001f);
+    EXPECT_FLOAT_EQ(1.0 / sqrt(147000.0), res, 0.0001f);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDSqrt, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
-    __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
+    __ vmulqs(Q2, Q0, Q0);     // Q2 <- xn^2
     __ vrsqrtsqs(Q2, Q1, Q2);  // Q2 <- (3 - Q1*Q2) / 2.
-    __ vmulqs(Q0, Q0, Q2);  // xn+1 <- xn * Q2
+    __ vmulqs(Q0, Q0, Q2);     // xn+1 <- xn * Q2
     // Second step.
     __ vmulqs(Q2, Q0, Q0);
     __ vrsqrtsqs(Q2, Q1, Q2);
     __ vmulqs(Q0, Q0, Q2);
 
     // Reciprocal.
     __ vmovq(Q1, Q0);
     // Reciprocal estimate.
     __ vrecpeqs(Q0, Q1);
     // 2 Newton-Raphson steps.
@@ skipping 20 matching lines @@
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 9.0);
     __ LoadSImmediate(S7, 16.0);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
-    __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
+    __ vmulqs(Q2, Q0, Q0);     // Q2 <- xn^2
     __ vrsqrtsqs(Q2, Q1, Q2);  // Q2 <- (3 - Q1*Q2) / 2.
-    __ vmulqs(Q0, Q0, Q2);  // xn+1 <- xn * Q2
+    __ vmulqs(Q0, Q0, Q2);     // xn+1 <- xn * Q2
     // Second step.
     __ vmulqs(Q2, Q0, Q0);
     __ vrsqrtsqs(Q2, Q1, Q2);
     __ vmulqs(Q0, Q0, Q2);
 
     // Reciprocal.
     __ vmovq(Q1, Q0);
     // Reciprocal estimate.
     __ vrecpeqs(Q0, Q1);
     // 2 Newton-Raphson steps.
@@ skipping 114 matching lines @@
 
 
 // Called from assembler_test.cc.
 // LR: return address.
 // R0: value.
 // R1: growable array.
 // R2: current thread.
 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
   __ PushList((1 << LR) | (1 << THR));
   __ mov(THR, Operand(R2));
-  __ StoreIntoObject(R1,
-                     FieldAddress(R1, GrowableObjectArray::data_offset()),
+  __ StoreIntoObject(R1, FieldAddress(R1, GrowableObjectArray::data_offset()),
                      R0);
   __ PopList((1 << LR) | (1 << THR));
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM