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Issue 2478313004: HalfFloat neon armv7 fix for destination pointer. (Closed)
Patch Set: fix vmovl.u16 to expand shorts to ints Created 4 years, 1 month ago
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1 /* 1 /*
2 * Copyright 2011 The LibYuv Project Authors. All rights reserved. 2 * Copyright 2011 The LibYuv Project Authors. All rights reserved.
3 * 3 *
4 * Use of this source code is governed by a BSD-style license 4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source 5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found 6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may 7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree. 8 * be found in the AUTHORS file in the root of the source tree.
9 */ 9 */
10 10
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2123 int diff = 0; 2123 int diff = 0;
2124 for (i = 0; i < y_plane_size; ++i) { 2124 for (i = 0; i < y_plane_size; ++i) {
2125 diff = dst_c[i] - dst_opt[i]; 2125 diff = dst_c[i] - dst_opt[i];
2126 if (diff) break; 2126 if (diff) break;
2127 } 2127 }
2128 2128
2129 free_aligned_buffer_page_end(orig_y); 2129 free_aligned_buffer_page_end(orig_y);
2130 return diff; 2130 return diff;
2131 } 2131 }
2132 2132
2133 #if defined(__arm__)
2134 static void EnableFlushDenormalToZero(void) {
2135 uint32_t cw;
2136 __asm__ __volatile__ (
2137 "vmrs %0, fpscr \n"
2138 "orr %0, %0, #0x1000000 \n"
2139 "vmsr fpscr, %0 \n"
2140 : "=r"(cw) :: "memory");
2141 }
2142 #endif
2143
2133 // 5 bit exponent with bias of 15 will underflow to a denormal if scale causes 2144 // 5 bit exponent with bias of 15 will underflow to a denormal if scale causes
2134 // exponent to be less than 0. 15 - log2(65536) = -1/ This shouldnt normally 2145 // exponent to be less than 0. 15 - log2(65536) = -1/ This shouldnt normally
2135 // happen since scale is 1/(1<<bits) where bits is 9, 10 or 12. 2146 // happen since scale is 1/(1<<bits) where bits is 9, 10 or 12.
2136 #define MAXHALFDIFF 0 2147
2148 #define MAXHALFDENORMALDIFF 0
2137 TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_16bit_denormal) { 2149 TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_16bit_denormal) {
2150 // 32 bit arm rounding on denormal is case is off by 1 compared to C.
wangcheng 2016/11/05 00:25:02 remove "is" in the comment
fbarchard1 2016/11/07 17:43:51 Done.
2151 #if defined(__arm__)
2152 EnableFlushDenormalToZero();
2153 #endif
2138 int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_, 2154 int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
2139 benchmark_iterations_, 2155 benchmark_iterations_,
2140 disable_cpu_flags_, benchmark_cpu_info_, 2156 disable_cpu_flags_, benchmark_cpu_info_,
2141 1.0f / 65536.0f, 65535); 2157 1.0f / 65536.0f, 65535);
2158 EXPECT_LE(diff, MAXHALFDENORMALDIFF);
2159 }
2160
2161 #define MAXHALFDIFF 0
2162 TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_16bit_One) {
2163 int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
2164 benchmark_iterations_,
2165 disable_cpu_flags_, benchmark_cpu_info_,
2166 1.0f, 65535);
2142 EXPECT_LE(diff, MAXHALFDIFF); 2167 EXPECT_LE(diff, MAXHALFDIFF);
2143 } 2168 }
2144 2169
2170 TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_16bit_Opt) {
2171 int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
2172 benchmark_iterations_,
2173 disable_cpu_flags_, benchmark_cpu_info_,
2174 1.0f / 4096.0f, 65535);
2175 EXPECT_LE(diff, MAXHALFDIFF);
2176 }
2177
2145 TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_10bit_Opt) { 2178 TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_10bit_Opt) {
2146 int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_, 2179 int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
2147 benchmark_iterations_, 2180 benchmark_iterations_,
2148 disable_cpu_flags_, benchmark_cpu_info_, 2181 disable_cpu_flags_, benchmark_cpu_info_,
2149 1.0f / 1024.0f, 1023); 2182 1.0f / 1024.0f, 1023);
2150 EXPECT_LE(diff, MAXHALFDIFF); 2183 EXPECT_LE(diff, MAXHALFDIFF);
2151 } 2184 }
2152 2185
2153 TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_9bit_Opt) { 2186 TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_9bit_Opt) {
2154 int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_, 2187 int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
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2549 } 2582 }
2550 2583
2551 free_aligned_buffer_page_end(src_pixels); 2584 free_aligned_buffer_page_end(src_pixels);
2552 free_aligned_buffer_page_end(tmp_pixels_u); 2585 free_aligned_buffer_page_end(tmp_pixels_u);
2553 free_aligned_buffer_page_end(tmp_pixels_v); 2586 free_aligned_buffer_page_end(tmp_pixels_v);
2554 free_aligned_buffer_page_end(dst_pixels_opt); 2587 free_aligned_buffer_page_end(dst_pixels_opt);
2555 free_aligned_buffer_page_end(dst_pixels_c); 2588 free_aligned_buffer_page_end(dst_pixels_c);
2556 } 2589 }
2557 2590
2558 } // namespace libyuv 2591 } // namespace libyuv
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