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Unified Diff: tests_lit/llvm2ice_tests/nop-insertion-no-vectors.ll

Issue 2478113003: [SubZero] Utilize instructions with immediate operands (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 1 month ago
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Index: tests_lit/llvm2ice_tests/nop-insertion-no-vectors.ll
diff --git a/tests_lit/llvm2ice_tests/nop-insertion-no-vectors.ll b/tests_lit/llvm2ice_tests/nop-insertion-no-vectors.ll
index 6e2ba5f48c0edc9799dc9b78920ba8629faf82cc..3a252701bb4f626281ea27aad3eb7e9d8666a710 100644
--- a/tests_lit/llvm2ice_tests/nop-insertion-no-vectors.ll
+++ b/tests_lit/llvm2ice_tests/nop-insertion-no-vectors.ll
@@ -32,47 +32,36 @@ entry:
; MIPS32P50N1: nop
; MIPS32P50N1: sw {{.*}}
; MIPS32P50N1: lw {{.*}}
-; MIPS32P50N1: li {{.*}}
+; MIPS32P50N1: addiu {{.*}},1
; MIPS32P50N1: nop
-; MIPS32P50N1: addu {{.*}}
; MIPS32P50N1: sw {{.*}}
-; MIPS32P50N1: nop
; MIPS32P50N1: lw {{.*}}
; MIPS32P50N1: nop
-; MIPS32P50N1: li {{.*}}
-; MIPS32P50N1: nop
-; MIPS32P50N1: addu {{.*}}
+; MIPS32P50N1: addiu {{.*}},2
; MIPS32P50N1: nop
; MIPS32P50N1: sw {{.*}}
-; MIPS32P50N1: lw {{.*}}
; MIPS32P50N1: nop
-; MIPS32P50N1: li {{.*}}
-; MIPS32P50N1: addu {{.*}}
+; MIPS32P50N1: lw {{.*}}
; MIPS32P50N1: nop
+; MIPS32P50N1: addiu {{.*}},3
; MIPS32P50N1: sw {{.*}}
-; MIPS32P50N1: lw {{.*}}
; MIPS32P50N1: nop
-; MIPS32P50N1: li {{.*}}
+; MIPS32P50N1: lw {{.*}}
+; MIPS32P50N1: addiu {{.*}},-1
; MIPS32P50N1: nop
-; MIPS32P50N1: subu {{.*}}
; MIPS32P50N1: sw {{.*}}
; MIPS32P50N1: lw {{.*}}
-; MIPS32P50N1: li {{.*}}
-; MIPS32P50N1: subu {{.*}}
-; MIPS32P50N1: sw {{.*}}
; MIPS32P50N1: nop
-; MIPS32P50N1: lw {{.*}}
-; MIPS32P50N1: li {{.*}}
-; MIPS32P50N1: subu {{.*}}
+; MIPS32P50N1: addiu {{.*}},-2
; MIPS32P50N1: nop
; MIPS32P50N1: sw {{.*}}
-; MIPS32P50N1: nop
; MIPS32P50N1: lw {{.*}}
-; MIPS32P50N1: nop
+; MIPS32P50N1: addiu {{.*}},-3
+; MIPS32P50N1: sw {{.*}}
+; MIPS32P50N1: lw {{.*}}
; MIPS32P50N1: lw {{.*}}
; MIPS32P50N1: nop
; MIPS32P50N1: mul {{.*}}
-; MIPS32P50N1: nop
; MIPS32P50N1: sw {{.*}}
; MIPS32P50N1: lw {{.*}}
; MIPS32P50N1: nop
@@ -81,7 +70,9 @@ entry:
; MIPS32P50N1: mul {{.*}}
; MIPS32P50N1: nop
; MIPS32P50N1: sw {{.*}}
+; MIPS32P50N1: nop
; MIPS32P50N1: lw {{.*}}
+; MIPS32P50N1: nop
; MIPS32P50N1: addiu {{.*}}
; MIPS32P50N1: jr ra
; MIPS32P50N1: nop
@@ -104,10 +95,7 @@ entry:
; MIPS32P110N2: lw {{.*}}
; MIPS32P110N2: nop
; MIPS32P110N2: nop
-; MIPS32P110N2: li {{.*}}
-; MIPS32P110N2: nop
-; MIPS32P110N2: nop
-; MIPS32P110N2: addu {{.*}}
+; MIPS32P110N2: addiu {{.*}},1
; MIPS32P110N2: nop
; MIPS32P110N2: nop
; MIPS32P110N2: sw {{.*}}
@@ -116,10 +104,7 @@ entry:
; MIPS32P110N2: lw {{.*}}
; MIPS32P110N2: nop
; MIPS32P110N2: nop
-; MIPS32P110N2: li {{.*}}
-; MIPS32P110N2: nop
-; MIPS32P110N2: nop
-; MIPS32P110N2: addu {{.*}}
+; MIPS32P110N2: addiu {{.*}},2
; MIPS32P110N2: nop
; MIPS32P110N2: nop
; MIPS32P110N2: sw {{.*}}
@@ -128,10 +113,7 @@ entry:
; MIPS32P110N2: lw {{.*}}
; MIPS32P110N2: nop
; MIPS32P110N2: nop
-; MIPS32P110N2: li {{.*}}
-; MIPS32P110N2: nop
-; MIPS32P110N2: nop
-; MIPS32P110N2: addu {{.*}}
+; MIPS32P110N2: addiu {{.*}},3
; MIPS32P110N2: nop
; MIPS32P110N2: nop
; MIPS32P110N2: sw {{.*}}
@@ -140,10 +122,7 @@ entry:
; MIPS32P110N2: lw {{.*}}
; MIPS32P110N2: nop
; MIPS32P110N2: nop
-; MIPS32P110N2: li {{.*}}
-; MIPS32P110N2: nop
-; MIPS32P110N2: nop
-; MIPS32P110N2: subu {{.*}}
+; MIPS32P110N2: addiu {{.*}},-1
; MIPS32P110N2: nop
; MIPS32P110N2: nop
; MIPS32P110N2: sw {{.*}}
@@ -152,10 +131,7 @@ entry:
; MIPS32P110N2: lw {{.*}}
; MIPS32P110N2: nop
; MIPS32P110N2: nop
-; MIPS32P110N2: li {{.*}}
-; MIPS32P110N2: nop
-; MIPS32P110N2: nop
-; MIPS32P110N2: subu {{.*}}
+; MIPS32P110N2: addiu {{.*}},-2
; MIPS32P110N2: nop
; MIPS32P110N2: nop
; MIPS32P110N2: sw {{.*}}
@@ -164,10 +140,7 @@ entry:
; MIPS32P110N2: lw {{.*}}
; MIPS32P110N2: nop
; MIPS32P110N2: nop
-; MIPS32P110N2: li {{.*}}
-; MIPS32P110N2: nop
-; MIPS32P110N2: nop
-; MIPS32P110N2: subu {{.*}}
+; MIPS32P110N2: addiu {{.*}},-3
; MIPS32P110N2: nop
; MIPS32P110N2: nop
; MIPS32P110N2: sw {{.*}}
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