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Issue 2478113003: [SubZero] Utilize instructions with immediate operands (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 1 month ago
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1 ; This tests a switch statement, including multiple branches to the 1 ; This tests a switch statement, including multiple branches to the
2 ; same label which also results in phi instructions with multiple 2 ; same label which also results in phi instructions with multiple
3 ; entries for the same incoming edge. 3 ; entries for the same incoming edge.
4 4
5 ; For x86 see adv-switch-opt.ll 5 ; For x86 see adv-switch-opt.ll
6 6
7 ; TODO(jvoung): Update to -02 once the phi assignments is done for ARM 7 ; TODO(jvoung): Update to -02 once the phi assignments is done for ARM
8 ; RUN: %if --need=target_ARM32 \ 8 ; RUN: %if --need=target_ARM32 \
9 ; RUN: --command %p2i --filetype=obj --disassemble \ 9 ; RUN: --command %p2i --filetype=obj --disassemble \
10 ; RUN: --target arm32 -i %s --args -Om1 \ 10 ; RUN: --target arm32 -i %s --args -Om1 \
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59 ; MIPS32: li {{.*}},7 59 ; MIPS32: li {{.*}},7
60 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <[[SW_BB1:.*]]> 60 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <[[SW_BB1:.*]]>
61 ; MIPS32: li {{.*}},8 61 ; MIPS32: li {{.*}},8
62 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <[[SW_BB1]]> 62 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <[[SW_BB1]]>
63 ; MIPS32: li {{.*}},15 63 ; MIPS32: li {{.*}},15
64 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <[[SW_BB2:.*]]> 64 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <[[SW_BB2:.*]]>
65 ; MIPS32: li {{.*}},14 65 ; MIPS32: li {{.*}},14
66 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <[[SW_BB2]]> 66 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <[[SW_BB2]]>
67 ; MIPS32: b {{.*}} <[[SW_DEFAULT:.*]]> 67 ; MIPS32: b {{.*}} <[[SW_DEFAULT:.*]]>
68 ; MIPS32: <[[SW_DEFAULT]]> 68 ; MIPS32: <[[SW_DEFAULT]]>
69 ; MIPS32: li» {{.*}},27 69 ; MIPS32: addiu»{{.*}},27
70 ; MIPS32: b {{.*}} <[[SW_EPILOG]]> 70 ; MIPS32: b {{.*}} <[[SW_EPILOG]]>
71 ; MIPS32: <[[SW_BB1]]> 71 ; MIPS32: <[[SW_BB1]]>
72 ; MIPS32: li {{.*}},21 72 ; MIPS32: li {{.*}},21
73 ; MIPS32: b {{.*}} <[[SW_BB2]]> 73 ; MIPS32: b {{.*}} <[[SW_BB2]]>
74 ; MIPS32: <[[SW_BB2]]> 74 ; MIPS32: <[[SW_BB2]]>
75 ; MIPS32: b {{.*}} <[[SW_EPILOG]]> 75 ; MIPS32: b {{.*}} <[[SW_EPILOG]]>
76 ; MIPS32: <[[SW_EPILOG]]> 76 ; MIPS32: <[[SW_EPILOG]]>
77 ; MIPS32: jr ra 77 ; MIPS32: jr ra
78 78
79 ; Check for a valid addressing mode when the switch operand is an 79 ; Check for a valid addressing mode when the switch operand is an
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232 ; MIPS32: li {{.*}},0 232 ; MIPS32: li {{.*}},0
233 ; MIPS32: li {{.*}},0 233 ; MIPS32: li {{.*}},0
234 ; MIPS32: bne {{.*}},{{.*}},{{.*}} <.LtestSwitchUndef64$local$__0> 234 ; MIPS32: bne {{.*}},{{.*}},{{.*}} <.LtestSwitchUndef64$local$__0>
235 ; MIPS32: li {{.*}},1 235 ; MIPS32: li {{.*}},1
236 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <.LtestSwitchUndef64$sw.default> 236 ; MIPS32: beq {{.*}},{{.*}},{{.*}} <.LtestSwitchUndef64$sw.default>
237 ; MIPS32: .LtestSwitchUndef64$local$__0 237 ; MIPS32: .LtestSwitchUndef64$local$__0
238 ; MIPS32: b {{.*}} <.LtestSwitchUndef64$sw.default> 238 ; MIPS32: b {{.*}} <.LtestSwitchUndef64$sw.default>
239 ; MIPS32: .LtestSwitchUndef64$sw.default 239 ; MIPS32: .LtestSwitchUndef64$sw.default
240 ; MIPS32: li {{.*}},20 240 ; MIPS32: li {{.*}},20
241 ; MIPS32: jr ra 241 ; MIPS32: jr ra
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