Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(581)

Side by Side Diff: tests_lit/llvm2ice_tests/shift.ll

Issue 2478113003: [SubZero] Utilize instructions with immediate operands (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 ; This is a test of C-level conversion operations that clang lowers 1 ; This is a test of C-level conversion operations that clang lowers
2 ; into pairs of shifts. 2 ; into pairs of shifts.
3 3
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
5 ; RUN: --target x8632 -i %s --args -O2 \ 5 ; RUN: --target x8632 -i %s --args -O2 \
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s
7 7
8 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 8 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
9 ; RUN: --target x8632 -i %s --args -Om1 \ 9 ; RUN: --target x8632 -i %s --args -Om1 \
10 ; RUN: | %if --need=target_X8632 --command FileCheck %s 10 ; RUN: | %if --need=target_X8632 --command FileCheck %s
(...skipping 64 matching lines...) Expand 10 before | Expand all | Expand 10 after
75 75
76 define internal i32 @shlImmLarge(i32 %val) { 76 define internal i32 @shlImmLarge(i32 %val) {
77 entry: 77 entry:
78 %result = shl i32 %val, 257 78 %result = shl i32 %val, 257
79 ret i32 %result 79 ret i32 %result
80 } 80 }
81 ; CHECK-LABEL: shlImmLarge 81 ; CHECK-LABEL: shlImmLarge
82 ; CHECK: shl {{.*}},0x1 82 ; CHECK: shl {{.*}},0x1
83 83
84 ; MIPS32-LABEL: shlImmLarge 84 ; MIPS32-LABEL: shlImmLarge
85 ; MIPS32: sllv 85 ; MIPS32: sll
86 86
87 define internal i32 @shlImmNeg(i32 %val) { 87 define internal i32 @shlImmNeg(i32 %val) {
88 entry: 88 entry:
89 %result = shl i32 %val, -1 89 %result = shl i32 %val, -1
90 ret i32 %result 90 ret i32 %result
91 } 91 }
92 ; CHECK-LABEL: shlImmNeg 92 ; CHECK-LABEL: shlImmNeg
93 ; CHECK: shl {{.*}},0xff 93 ; CHECK: shl {{.*}},0xff
94 94
95 ; MIPS32-LABEL: shlImmNeg 95 ; MIPS32-LABEL: shlImmNeg
96 ; MIPS32: sllv 96 ; MIPS32: sll
97 97
98 define internal i32 @lshrImmLarge(i32 %val) { 98 define internal i32 @lshrImmLarge(i32 %val) {
99 entry: 99 entry:
100 %result = lshr i32 %val, 257 100 %result = lshr i32 %val, 257
101 ret i32 %result 101 ret i32 %result
102 } 102 }
103 ; CHECK-LABEL: lshrImmLarge 103 ; CHECK-LABEL: lshrImmLarge
104 ; CHECK: shr {{.*}},0x1 104 ; CHECK: shr {{.*}},0x1
105 105
106 ; MIPS32-LABEL: lshrImmLarge 106 ; MIPS32-LABEL: lshrImmLarge
107 ; MIPS32: srlv 107 ; MIPS32: srl
108 108
109 define internal i32 @lshrImmNeg(i32 %val) { 109 define internal i32 @lshrImmNeg(i32 %val) {
110 entry: 110 entry:
111 %result = lshr i32 %val, -1 111 %result = lshr i32 %val, -1
112 ret i32 %result 112 ret i32 %result
113 } 113 }
114 ; CHECK-LABEL: lshrImmNeg 114 ; CHECK-LABEL: lshrImmNeg
115 ; CHECK: shr {{.*}},0xff 115 ; CHECK: shr {{.*}},0xff
116 116
117 ; MIPS32-LABEL: lshrImmNeg 117 ; MIPS32-LABEL: lshrImmNeg
118 ; MIPS32: srlv 118 ; MIPS32: srl
119 119
120 define internal i32 @ashrImmLarge(i32 %val) { 120 define internal i32 @ashrImmLarge(i32 %val) {
121 entry: 121 entry:
122 %result = ashr i32 %val, 257 122 %result = ashr i32 %val, 257
123 ret i32 %result 123 ret i32 %result
124 } 124 }
125 ; CHECK-LABEL: ashrImmLarge 125 ; CHECK-LABEL: ashrImmLarge
126 ; CHECK: sar {{.*}},0x1 126 ; CHECK: sar {{.*}},0x1
127 127
128 ; MIPS32-LABEL: ashrImmLarge 128 ; MIPS32-LABEL: ashrImmLarge
129 ; MIPS32: srav 129 ; MIPS32: sra
130 130
131 define internal i32 @ashrImmNeg(i32 %val) { 131 define internal i32 @ashrImmNeg(i32 %val) {
132 entry: 132 entry:
133 %result = ashr i32 %val, -1 133 %result = ashr i32 %val, -1
134 ret i32 %result 134 ret i32 %result
135 } 135 }
136 ; CHECK-LABEL: ashrImmNeg 136 ; CHECK-LABEL: ashrImmNeg
137 ; CHECK: sar {{.*}},0xff 137 ; CHECK: sar {{.*}},0xff
138 138
139 ; MIPS32-LABEL: ashrImmNeg 139 ; MIPS32-LABEL: ashrImmNeg
140 ; MIPS32: srav 140 ; MIPS32: sra
141 141
142 define internal i64 @shlImm64One(i64 %val) { 142 define internal i64 @shlImm64One(i64 %val) {
143 entry: 143 entry:
144 %result = shl i64 %val, 1 144 %result = shl i64 %val, 1
145 ret i64 %result 145 ret i64 %result
146 } 146 }
147 ; CHECK-LABEL: shlImm64One 147 ; CHECK-LABEL: shlImm64One
148 ; CHECK: shl {{.*}},1 148 ; CHECK: shl {{.*}},1
149 ; MIPS32-LABEL: shlImm64One 149 ; MIPS32-LABEL: shlImm64One
150 ; MIPS32: addu [[T_LO:.*]],[[VAL_LO:.*]],[[VAL_LO]] 150 ; MIPS32: addu [[T_LO:.*]],[[VAL_LO:.*]],[[VAL_LO]]
(...skipping 136 matching lines...) Expand 10 before | Expand all | Expand 10 after
287 entry: 287 entry:
288 %result = ashr i64 %val, 40 288 %result = ashr i64 %val, 40
289 ret i64 %result 289 ret i64 %result
290 } 290 }
291 ; CHECK-LABEL: ashrImm64GreaterThan32 291 ; CHECK-LABEL: ashrImm64GreaterThan32
292 ; CHECK: sar {{.*}},0x1f 292 ; CHECK: sar {{.*}},0x1f
293 ; CHECK: shrd {{.*}},0x8 293 ; CHECK: shrd {{.*}},0x8
294 ; MIPS32-LABEL: ashrImm64GreaterThan32 294 ; MIPS32-LABEL: ashrImm64GreaterThan32
295 ; MIPS32: sra {{.*}},[[VAL_HI:.*]],0x8 295 ; MIPS32: sra {{.*}},[[VAL_HI:.*]],0x8
296 ; MIPS32: sra {{.*}},[[VAL_HI]],0x1f 296 ; MIPS32: sra {{.*}},[[VAL_HI]],0x1f
OLDNEW
« no previous file with comments | « tests_lit/llvm2ice_tests/nop-insertion-no-vectors.ll ('k') | tests_lit/llvm2ice_tests/switch-opt.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698