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Issue 2478113003: [SubZero] Utilize instructions with immediate operands (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 1 month ago
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1 ; Tests various aspects of i1 related lowering. 1 ; Tests various aspects of i1 related lowering.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 -i %s --args -O2 \ 4 ; RUN: --target x8632 -i %s --args -O2 \
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s
6 6
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
8 ; RUN: --target x8632 -i %s --args -Om1 \ 8 ; RUN: --target x8632 -i %s --args -Om1 \
9 ; RUN: | %if --need=target_X8632 --command FileCheck %s 9 ; RUN: | %if --need=target_X8632 --command FileCheck %s
10 10
(...skipping 16 matching lines...)
27 %arg_i1 = trunc i32 %arg to i1 27 %arg_i1 = trunc i32 %arg to i1
28 %result_i1 = and i1 %arg_i1, true 28 %result_i1 = and i1 %arg_i1, true
29 %result = zext i1 %result_i1 to i32 29 %result = zext i1 %result_i1 to i32
30 ret i32 %result 30 ret i32 %result
31 } 31 }
32 ; CHECK-LABEL: testAndTrue 32 ; CHECK-LABEL: testAndTrue
33 ; CHECK: and {{.*}},0x1 33 ; CHECK: and {{.*}},0x1
34 ; ARM32-LABEL: testAndTrue 34 ; ARM32-LABEL: testAndTrue
35 ; ARM32: and {{.*}}, #1 35 ; ARM32: and {{.*}}, #1
36 ; MIPS32-LABEL: testAndTrue 36 ; MIPS32-LABEL: testAndTrue
37 ; MIPS32: » li» [[REG:.*]],1 37 ; MIPS32: » andi» {{.*}},0x1
38 ; MIPS32: » and» {{.*}},[[REG]]
39 38
40 ; Test that or with true uses immediate 1, not -1. 39 ; Test that or with true uses immediate 1, not -1.
41 define internal i32 @testOrTrue(i32 %arg) { 40 define internal i32 @testOrTrue(i32 %arg) {
42 entry: 41 entry:
43 %arg_i1 = trunc i32 %arg to i1 42 %arg_i1 = trunc i32 %arg to i1
44 %result_i1 = or i1 %arg_i1, true 43 %result_i1 = or i1 %arg_i1, true
45 %result = zext i1 %result_i1 to i32 44 %result = zext i1 %result_i1 to i32
46 ret i32 %result 45 ret i32 %result
47 } 46 }
48 ; CHECK-LABEL: testOrTrue 47 ; CHECK-LABEL: testOrTrue
49 ; CHECK: or {{.*}},0x1 48 ; CHECK: or {{.*}},0x1
50 ; ARM32-LABEL: testOrTrue 49 ; ARM32-LABEL: testOrTrue
51 ; ARM32: orr {{.*}}, #1 50 ; ARM32: orr {{.*}}, #1
52 ; MIPS32-LABEL: testOrTrue 51 ; MIPS32-LABEL: testOrTrue
53 ; MIPS32: » li» [[REG:.*]],1 52 ; MIPS32: » ori» {{.*}},0x1
54 ; MIPS32: » or» {{.*}},[[REG]]
55 53
56 ; Test that xor with true uses immediate 1, not -1. 54 ; Test that xor with true uses immediate 1, not -1.
57 define internal i32 @testXorTrue(i32 %arg) { 55 define internal i32 @testXorTrue(i32 %arg) {
58 entry: 56 entry:
59 %arg_i1 = trunc i32 %arg to i1 57 %arg_i1 = trunc i32 %arg to i1
60 %result_i1 = xor i1 %arg_i1, true 58 %result_i1 = xor i1 %arg_i1, true
61 %result = zext i1 %result_i1 to i32 59 %result = zext i1 %result_i1 to i32
62 ret i32 %result 60 ret i32 %result
63 } 61 }
64 ; CHECK-LABEL: testXorTrue 62 ; CHECK-LABEL: testXorTrue
65 ; CHECK: xor {{.*}},0x1 63 ; CHECK: xor {{.*}},0x1
66 ; ARM32-LABEL: testXorTrue 64 ; ARM32-LABEL: testXorTrue
67 ; ARM32: eor {{.*}}, #1 65 ; ARM32: eor {{.*}}, #1
68 ; MIPS32-LABEL: testXorTrue 66 ; MIPS32-LABEL: testXorTrue
69 ; MIPS32: » li» [[REG:.*]],1 67 ; MIPS32: » xori» {{.*}},0x1
70 ; MIPS32: » xor» {{.*}},[[REG]]
71 68
72 ; Test that trunc to i1 masks correctly. 69 ; Test that trunc to i1 masks correctly.
73 define internal i32 @testTrunc(i32 %arg) { 70 define internal i32 @testTrunc(i32 %arg) {
74 entry: 71 entry:
75 %arg_i1 = trunc i32 %arg to i1 72 %arg_i1 = trunc i32 %arg to i1
76 %result = zext i1 %arg_i1 to i32 73 %result = zext i1 %arg_i1 to i32
77 ret i32 %result 74 ret i32 %result
78 } 75 }
79 ; CHECK-LABEL: testTrunc 76 ; CHECK-LABEL: testTrunc
80 ; CHECK: and {{.*}},0x1 77 ; CHECK: and {{.*}},0x1
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342 ; CHECK: cvttsd2si 339 ; CHECK: cvttsd2si
343 ; CHECK: and {{.*}},0x1 340 ; CHECK: and {{.*}},0x1
344 ; CHECK: movzx [[REG:.*]], 341 ; CHECK: movzx [[REG:.*]],
345 ; CHECK-NEXT: shl [[REG]],0x1f 342 ; CHECK-NEXT: shl [[REG]],0x1f
346 ; CHECK-NEXT: sar [[REG]],0x1f 343 ; CHECK-NEXT: sar [[REG]],0x1f
347 ; MIPS32-LABEL: testFptosiDouble 344 ; MIPS32-LABEL: testFptosiDouble
348 ; MIPS32: trunc.w.d 345 ; MIPS32: trunc.w.d
349 ; MIPS32: mfc1 346 ; MIPS32: mfc1
350 ; MIPS32: sll {{.*}},0x1f 347 ; MIPS32: sll {{.*}},0x1f
351 ; MIPS32: sra {{.*}},0x1f 348 ; MIPS32: sra {{.*}},0x1f
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