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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
| 6 #include "src/compilation-info.h" | 6 #include "src/compilation-info.h" |
| 7 #include "src/compiler/code-generator-impl.h" | 7 #include "src/compiler/code-generator-impl.h" |
| 8 #include "src/compiler/gap-resolver.h" | 8 #include "src/compiler/gap-resolver.h" |
| 9 #include "src/compiler/node-matchers.h" | 9 #include "src/compiler/node-matchers.h" |
| 10 #include "src/compiler/osr.h" | 10 #include "src/compiler/osr.h" |
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| 2019 Label false_value; | 2019 Label false_value; |
| 2020 DCHECK_NE(0u, instr->OutputCount()); | 2020 DCHECK_NE(0u, instr->OutputCount()); |
| 2021 Register result = i.OutputRegister(instr->OutputCount() - 1); | 2021 Register result = i.OutputRegister(instr->OutputCount() - 1); |
| 2022 Condition cc = kNoCondition; | 2022 Condition cc = kNoCondition; |
| 2023 // MIPS does not have condition code flags, so compare and branch are | 2023 // MIPS does not have condition code flags, so compare and branch are |
| 2024 // implemented differently than on the other arch's. The compare operations | 2024 // implemented differently than on the other arch's. The compare operations |
| 2025 // emit mips pseudo-instructions, which are checked and handled here. | 2025 // emit mips pseudo-instructions, which are checked and handled here. |
| 2026 | 2026 |
| 2027 if (instr->arch_opcode() == kMips64Tst) { | 2027 if (instr->arch_opcode() == kMips64Tst) { |
| 2028 cc = FlagsConditionToConditionTst(condition); | 2028 cc = FlagsConditionToConditionTst(condition); |
| 2029 __ And(kScratchReg, i.InputRegister(0), i.InputOperand(1)); | 2029 if (instr->InputAt(1)->IsImmediate() && |
|
dusan.simicic
2016/11/09 12:40:49
Take a look at comment for mips32, the same could
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| 2030 __ Sltu(result, zero_reg, kScratchReg); | 2030 i.InputOperand(1).immediate() == 1) { |
| 2031 __ Ext(result, i.InputRegister(0), 0, 1); | |
| 2032 } else { | |
| 2033 __ And(kScratchReg, i.InputRegister(0), i.InputOperand(1)); | |
| 2034 __ Sltu(result, zero_reg, kScratchReg); | |
| 2035 } | |
| 2031 if (cc == eq) { | 2036 if (cc == eq) { |
| 2032 // Sltu produces 0 for equality, invert the result. | 2037 // Sltu produces 0 for equality, invert the result. |
| 2033 __ xori(result, result, 1); | 2038 __ xori(result, result, 1); |
| 2034 } | 2039 } |
| 2035 return; | 2040 return; |
| 2036 } else if (instr->arch_opcode() == kMips64Dadd || | 2041 } else if (instr->arch_opcode() == kMips64Dadd || |
| 2037 instr->arch_opcode() == kMips64Dsub) { | 2042 instr->arch_opcode() == kMips64Dsub) { |
| 2038 cc = FlagsConditionToConditionOvf(condition); | 2043 cc = FlagsConditionToConditionOvf(condition); |
| 2039 // Check for overflow creates 1 or 0 for result. | 2044 // Check for overflow creates 1 or 0 for result. |
| 2040 __ dsrl32(kScratchReg, i.OutputRegister(), 31); | 2045 __ dsrl32(kScratchReg, i.OutputRegister(), 31); |
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| 2543 padding_size -= v8::internal::Assembler::kInstrSize; | 2548 padding_size -= v8::internal::Assembler::kInstrSize; |
| 2544 } | 2549 } |
| 2545 } | 2550 } |
| 2546 } | 2551 } |
| 2547 | 2552 |
| 2548 #undef __ | 2553 #undef __ |
| 2549 | 2554 |
| 2550 } // namespace compiler | 2555 } // namespace compiler |
| 2551 } // namespace internal | 2556 } // namespace internal |
| 2552 } // namespace v8 | 2557 } // namespace v8 |
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