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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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855 | 855 |
856 public: | 856 public: |
857 static std::unique_ptr<TargetDataLowering> create(GlobalContext *Ctx) { | 857 static std::unique_ptr<TargetDataLowering> create(GlobalContext *Ctx) { |
858 return std::unique_ptr<TargetDataLowering>(new TargetDataMIPS32(Ctx)); | 858 return std::unique_ptr<TargetDataLowering>(new TargetDataMIPS32(Ctx)); |
859 } | 859 } |
860 | 860 |
861 void lowerGlobals(const VariableDeclarationList &Vars, | 861 void lowerGlobals(const VariableDeclarationList &Vars, |
862 const std::string &SectionSuffix) override; | 862 const std::string &SectionSuffix) override; |
863 void lowerConstants() override; | 863 void lowerConstants() override; |
864 void lowerJumpTables() override; | 864 void lowerJumpTables() override; |
865 void emitTargetRODataSections() override; | |
865 | 866 |
866 protected: | 867 protected: |
867 explicit TargetDataMIPS32(GlobalContext *Ctx); | 868 explicit TargetDataMIPS32(GlobalContext *Ctx); |
868 | 869 |
869 private: | 870 private: |
870 ~TargetDataMIPS32() override = default; | 871 ~TargetDataMIPS32() override = default; |
871 }; | 872 }; |
872 | 873 |
873 class TargetHeaderMIPS32 final : public TargetHeaderLowering { | 874 class TargetHeaderMIPS32 final : public TargetHeaderLowering { |
874 TargetHeaderMIPS32() = delete; | 875 TargetHeaderMIPS32() = delete; |
875 TargetHeaderMIPS32(const TargetHeaderMIPS32 &) = delete; | 876 TargetHeaderMIPS32(const TargetHeaderMIPS32 &) = delete; |
876 TargetHeaderMIPS32 &operator=(const TargetHeaderMIPS32 &) = delete; | 877 TargetHeaderMIPS32 &operator=(const TargetHeaderMIPS32 &) = delete; |
877 | 878 |
878 public: | 879 public: |
879 static std::unique_ptr<TargetHeaderLowering> create(GlobalContext *Ctx) { | 880 static std::unique_ptr<TargetHeaderLowering> create(GlobalContext *Ctx) { |
880 return std::unique_ptr<TargetHeaderLowering>(new TargetHeaderMIPS32(Ctx)); | 881 return std::unique_ptr<TargetHeaderLowering>(new TargetHeaderMIPS32(Ctx)); |
881 } | 882 } |
882 | 883 |
883 void lower() override; | 884 void lower() override; |
884 | 885 |
885 protected: | 886 protected: |
886 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 887 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
887 | 888 |
888 private: | 889 private: |
889 ~TargetHeaderMIPS32() = default; | 890 ~TargetHeaderMIPS32() = default; |
890 }; | 891 }; |
891 | 892 |
893 struct MipsABIFlagsSection { | |
894 | |
Jim Stichnoth
2016/11/03 13:23:40
Most of this looks like it was taken from llvm/lib
jaydeep.patil
2016/11/04 04:34:47
Done.
| |
895 // Version of the MIPS.abiflags section | |
896 enum AFL_VERSION { | |
897 AFL_VERSION_V0 = 0 // Version 0 | |
898 }; | |
899 | |
900 // The level of the ISA: 1-5, 32, 64. | |
901 enum AFL_ISA_LEVEL { | |
902 AFL_ISA_LEVEL_NONE = 0, | |
903 AFL_ISA_LEVEL_MIPS32 = 32, // MIPS32 | |
904 }; | |
905 | |
906 // The revision of ISA: 0 for MIPS V and below, 1-n otherwise. | |
907 enum AFL_ISA_REV { | |
908 AFL_ISA_REV_NONE = 0, | |
909 AFL_ISA_REV_R1 = 1, // R1 | |
910 }; | |
911 | |
912 // Values for the xxx_size bytes of an ABI flags structure. | |
913 enum AFL_REG { | |
914 AFL_REG_NONE = 0x00, // No registers. | |
915 AFL_REG_32 = 0x01, // 32-bit registers. | |
916 AFL_REG_64 = 0x02, // 64-bit registers. | |
917 AFL_REG_128 = 0x03 // 128-bit registers. | |
918 }; | |
919 | |
920 // Values for the fp_abi word of an ABI flags structure. | |
921 enum AFL_FP_ABI { | |
922 AFL_FP_ANY = 0, | |
923 AFL_FP_DOUBLE = 1, | |
924 AFL_FP_XX = 5, | |
925 AFL_FP_64 = 6, | |
926 AFL_FP_64A = 7 | |
927 }; | |
928 | |
929 // Values for the isa_ext word of an ABI flags structure. | |
930 enum AFL_EXT { | |
931 AFL_EXT_NONE = 0, | |
932 AFL_EXT_XLR = 1, // RMI Xlr instruction. | |
933 AFL_EXT_OCTEON2 = 2, // Cavium Networks Octeon2. | |
934 AFL_EXT_OCTEONP = 3, // Cavium Networks OcteonP. | |
935 AFL_EXT_LOONGSON_3A = 4, // Loongson 3A. | |
936 AFL_EXT_OCTEON = 5, // Cavium Networks Octeon. | |
937 AFL_EXT_5900 = 6, // MIPS R5900 instruction. | |
938 AFL_EXT_4650 = 7, // MIPS R4650 instruction. | |
939 AFL_EXT_4010 = 8, // LSI R4010 instruction. | |
940 AFL_EXT_4100 = 9, // NEC VR4100 instruction. | |
941 AFL_EXT_3900 = 10, // Toshiba R3900 instruction. | |
942 AFL_EXT_10000 = 11, // MIPS R10000 instruction. | |
943 AFL_EXT_SB1 = 12, // Broadcom SB-1 instruction. | |
944 AFL_EXT_4111 = 13, // NEC VR4111/VR4181 instruction. | |
945 AFL_EXT_4120 = 14, // NEC VR4120 instruction. | |
946 AFL_EXT_5400 = 15, // NEC VR5400 instruction. | |
947 AFL_EXT_5500 = 16, // NEC VR5500 instruction. | |
948 AFL_EXT_LOONGSON_2E = 17, // ST Microelectronics Loongson 2E. | |
949 AFL_EXT_LOONGSON_2F = 18 // ST Microelectronics Loongson 2F. | |
950 }; | |
951 | |
952 // Masks for the ases word of an ABI flags structure. | |
953 enum AFL_ASE { | |
954 AFL_ASE_NONE = 0x00000000, | |
955 AFL_ASE_DSP = 0x00000001, // DSP ASE. | |
956 AFL_ASE_DSPR2 = 0x00000002, // DSP R2 ASE. | |
957 AFL_ASE_EVA = 0x00000004, // Enhanced VA Scheme. | |
958 AFL_ASE_MCU = 0x00000008, // MCU (MicroController) ASE. | |
959 AFL_ASE_MDMX = 0x00000010, // MDMX ASE. | |
960 AFL_ASE_MIPS3D = 0x00000020, // MIPS-3D ASE. | |
961 AFL_ASE_MT = 0x00000040, // MT ASE. | |
962 AFL_ASE_SMARTMIPS = 0x00000080, // SmartMIPS ASE. | |
963 AFL_ASE_VIRT = 0x00000100, // VZ ASE. | |
964 AFL_ASE_MSA = 0x00000200, // MSA ASE. | |
965 AFL_ASE_MIPS16 = 0x00000400, // MIPS16 ASE. | |
966 AFL_ASE_MICROMIPS = 0x00000800, // MICROMIPS ASE. | |
967 AFL_ASE_XPA = 0x00001000 // XPA ASE. | |
968 }; | |
969 | |
970 enum AFL_FLAGS1 { AFL_FLAGS1_NONE = 0, AFL_FLAGS1_ODDSPREG = 1 }; | |
971 | |
972 enum AFL_FLAGS2 { AFL_FLAGS2_NONE = 0 }; | |
973 | |
974 uint16_t Version; | |
Jim Stichnoth
2016/11/03 13:23:40
I think you'd be better off doing something like t
jaydeep.patil
2016/11/04 04:34:47
Done.
| |
975 uint8_t ISALevel; | |
976 uint8_t ISARevision; | |
977 uint8_t GPRSize; | |
978 uint8_t CPR1Size; | |
979 uint8_t CPR2Size; | |
980 uint8_t FPABI; | |
981 uint32_t Extension; | |
982 uint32_t ASE; | |
983 uint32_t Flags1; | |
984 uint32_t Flags2; | |
985 | |
986 public: | |
Jim Stichnoth
2016/11/03 13:23:40
"public:" isn't needed since this is a struct not
jaydeep.patil
2016/11/04 04:34:47
Done.
| |
987 void setAbiFlags(void) { | |
Jim Stichnoth
2016/11/03 13:23:40
Remove the void arg specification (not needed in C
jaydeep.patil
2016/11/04 04:34:47
Removed the function.
| |
988 Version = AFL_VERSION_V0; | |
989 ISALevel = AFL_ISA_LEVEL_MIPS32; | |
990 ISARevision = AFL_ISA_REV_R1; | |
991 GPRSize = AFL_REG_32; | |
992 CPR1Size = AFL_REG_32; | |
993 CPR2Size = AFL_REG_NONE; | |
994 FPABI = AFL_FP_DOUBLE; | |
995 Extension = AFL_EXT_NONE; | |
996 ASE = AFL_ASE_NONE; | |
997 Flags1 = AFL_FLAGS1_ODDSPREG; | |
998 Flags2 = AFL_FLAGS2_NONE; | |
999 } | |
1000 }; | |
1001 | |
892 } // end of namespace MIPS32 | 1002 } // end of namespace MIPS32 |
893 } // end of namespace Ice | 1003 } // end of namespace Ice |
894 | 1004 |
895 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 1005 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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