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Side by Side Diff: src/compiler/instruction.h

Issue 2468233004: [Turbofan] Reduce register allocation work when we can. (Closed)
Patch Set: Review comments. Created 4 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_INSTRUCTION_H_ 5 #ifndef V8_COMPILER_INSTRUCTION_H_
6 #define V8_COMPILER_INSTRUCTION_H_ 6 #define V8_COMPILER_INSTRUCTION_H_
7 7
8 #include <deque> 8 #include <deque>
9 #include <iosfwd> 9 #include <iosfwd>
10 #include <map> 10 #include <map>
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1382 return instruction_blocks_->at(rpo_number.ToSize()); 1382 return instruction_blocks_->at(rpo_number.ToSize());
1383 } 1383 }
1384 1384
1385 InstructionBlock* GetInstructionBlock(int instruction_index) const; 1385 InstructionBlock* GetInstructionBlock(int instruction_index) const;
1386 1386
1387 static MachineRepresentation DefaultRepresentation() { 1387 static MachineRepresentation DefaultRepresentation() {
1388 return MachineType::PointerRepresentation(); 1388 return MachineType::PointerRepresentation();
1389 } 1389 }
1390 MachineRepresentation GetRepresentation(int virtual_register) const; 1390 MachineRepresentation GetRepresentation(int virtual_register) const;
1391 void MarkAsRepresentation(MachineRepresentation rep, int virtual_register); 1391 void MarkAsRepresentation(MachineRepresentation rep, int virtual_register);
1392 int representation_mask() const { return representation_mask_; }
1392 1393
1393 bool IsReference(int virtual_register) const { 1394 bool IsReference(int virtual_register) const {
1394 return CanBeTaggedPointer(GetRepresentation(virtual_register)); 1395 return CanBeTaggedPointer(GetRepresentation(virtual_register));
1395 } 1396 }
1396 bool IsFP(int virtual_register) const { 1397 bool IsFP(int virtual_register) const {
1397 return IsFloatingPoint(GetRepresentation(virtual_register)); 1398 return IsFloatingPoint(GetRepresentation(virtual_register));
1398 } 1399 }
1399 bool IsFloat(int virtual_register) const {
1400 return GetRepresentation(virtual_register) ==
1401 MachineRepresentation::kFloat32;
1402 }
1403 bool IsDouble(int virtual_register) const {
1404 return GetRepresentation(virtual_register) ==
1405 MachineRepresentation::kFloat64;
1406 }
1407 1400
1408 Instruction* GetBlockStart(RpoNumber rpo) const; 1401 Instruction* GetBlockStart(RpoNumber rpo) const;
1409 1402
1410 typedef InstructionDeque::const_iterator const_iterator; 1403 typedef InstructionDeque::const_iterator const_iterator;
1411 const_iterator begin() const { return instructions_.begin(); } 1404 const_iterator begin() const { return instructions_.begin(); }
1412 const_iterator end() const { return instructions_.end(); } 1405 const_iterator end() const { return instructions_.end(); }
1413 const InstructionDeque& instructions() const { return instructions_; } 1406 const InstructionDeque& instructions() const { return instructions_; }
1414 int LastInstructionIndex() const { 1407 int LastInstructionIndex() const {
1415 return static_cast<int>(instructions().size()) - 1; 1408 return static_cast<int>(instructions().size()) - 1;
1416 } 1409 }
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1514 Isolate* isolate_; 1507 Isolate* isolate_;
1515 Zone* const zone_; 1508 Zone* const zone_;
1516 InstructionBlocks* const instruction_blocks_; 1509 InstructionBlocks* const instruction_blocks_;
1517 SourcePositionMap source_positions_; 1510 SourcePositionMap source_positions_;
1518 ConstantMap constants_; 1511 ConstantMap constants_;
1519 Immediates immediates_; 1512 Immediates immediates_;
1520 InstructionDeque instructions_; 1513 InstructionDeque instructions_;
1521 int next_virtual_register_; 1514 int next_virtual_register_;
1522 ReferenceMapDeque reference_maps_; 1515 ReferenceMapDeque reference_maps_;
1523 ZoneVector<MachineRepresentation> representations_; 1516 ZoneVector<MachineRepresentation> representations_;
1517 int representation_mask_;
1524 DeoptimizationVector deoptimization_entries_; 1518 DeoptimizationVector deoptimization_entries_;
1525 1519
1526 // Used at construction time 1520 // Used at construction time
1527 InstructionBlock* current_block_; 1521 InstructionBlock* current_block_;
1528 1522
1529 DISALLOW_COPY_AND_ASSIGN(InstructionSequence); 1523 DISALLOW_COPY_AND_ASSIGN(InstructionSequence);
1530 }; 1524 };
1531 1525
1532 1526
1533 struct PrintableInstructionSequence { 1527 struct PrintableInstructionSequence {
1534 const RegisterConfiguration* register_configuration_; 1528 const RegisterConfiguration* register_configuration_;
1535 const InstructionSequence* sequence_; 1529 const InstructionSequence* sequence_;
1536 }; 1530 };
1537 1531
1538 V8_EXPORT_PRIVATE std::ostream& operator<<( 1532 V8_EXPORT_PRIVATE std::ostream& operator<<(
1539 std::ostream& os, const PrintableInstructionSequence& code); 1533 std::ostream& os, const PrintableInstructionSequence& code);
1540 1534
1541 } // namespace compiler 1535 } // namespace compiler
1542 } // namespace internal 1536 } // namespace internal
1543 } // namespace v8 1537 } // namespace v8
1544 1538
1545 #endif // V8_COMPILER_INSTRUCTION_H_ 1539 #endif // V8_COMPILER_INSTRUCTION_H_
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