[Turbofan] Reduce register allocation work when we can.

[Turbofan] Reduce register allocation work when we can.
- Track representations of virtual registers in InstructionSequence.
- Skip extra aliasing work when no floats or SIMD registers are used.

LOG=N
BUG=v8:4124
Committed: https://crrev.com/472cb045c5a809efa7572213362ef2c57b04946d
Cr-Commit-Position: refs/heads/master@{#40870}

[bbudge, 2016-11-02 23:15:20]

The CQ bit was checked by bbudge@chromium.org to run a CQ dry run

[commit-bot: I haz the power, 2016-11-02 23:15:27]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-11-03 00:05:50]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-11-03 00:05:51]

Dry run: This issue passed the CQ dry run.

[bbudge, 2016-11-03 17:20:22]

The CQ bit was checked by bbudge@chromium.org to run a CQ dry run

[commit-bot: I haz the power, 2016-11-03 17:20:25]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-11-03 17:46:31]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-11-03 17:46:32]

Dry run: This issue passed the CQ dry run.

[bbudge, 2016-11-03 22:18:34]

The CQ bit was checked by bbudge@chromium.org to run a CQ dry run

[commit-bot: I haz the power, 2016-11-03 22:18:39]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[bbudge, 2016-11-04 18:06:06]

bbudge@chromium.org changed reviewers:
+ jarin@chromium.org, mtrofin@chromium.org

[Mircea Trofin, 2016-11-04 22:57:25]

https://codereview.chromium.org/2468233004/diff/100001/src/compiler/instructi...
File src/compiler/instruction.cc (right):

https://codereview.chromium.org/2468233004/diff/100001/src/compiler/instructi...
src/compiler/instruction.cc:923: }
dcheck for rep's value?

also, this would have problems if we have more than 32 different reps and the
instruction takes more than 32 vregs - probably very unlikely case, but how
about using a BitVector instead, dimensioned to the number of possible
representations, and then it's a bit more readable to see what's happening here
and elsewhere we use representation_mask_?

[bbudge, 2016-11-04 23:28:52]

Patchset #7 (id:120001) has been deleted

[bbudge, 2016-11-04 23:30:33]

https://codereview.chromium.org/2468233004/diff/100001/src/compiler/instructi...
File src/compiler/instruction.cc (right):

https://codereview.chromium.org/2468233004/diff/100001/src/compiler/instructi...
src/compiler/instruction.cc:923: }
On 2016/11/04 22:57:25, Mircea Trofin wrote:
> dcheck for rep's value?
> 
> also, this would have problems if we have more than 32 different reps and the
> instruction takes more than 32 vregs - probably very unlikely case, but how
> about using a BitVector instead, dimensioned to the number of possible
> representations, and then it's a bit more readable to see what's happening
here
> and elsewhere we use representation_mask_?

Since there are only 11 representations currently, we have plenty of room in an
int. This collapses the representations for all vregs in an InstructionSequence
into a single int so the number of vregs isn't an issue.

I'll add a static_assert in machine-type.h as a defensive measure. Note, we also
use these bit masks of representations in MoveOptimizer and GapResolver to
quickly check if we need aliasing tests.

[bbudge, 2016-11-05 00:00:38]

The CQ bit was checked by bbudge@chromium.org to run a CQ dry run

[commit-bot: I haz the power, 2016-11-05 00:00:44]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-11-05 00:27:31]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-11-05 00:27:32]

Dry run: This issue passed the CQ dry run.

[bbudge, 2016-11-08 19:05:35]

friendly ping

[Jarin, 2016-11-08 19:32:50]

lgtm

[Mircea Trofin, 2016-11-09 16:54:52]

On 2016/11/08 19:32:50, Jarin wrote:
> lgtm

lgtm

[bbudge, 2016-11-09 17:19:52]

The CQ bit was checked by bbudge@chromium.org to run a CQ dry run

[commit-bot: I haz the power, 2016-11-09 17:19:58]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-11-09 17:47:43]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-11-09 17:47:44]

Dry run: This issue passed the CQ dry run.

[bbudge, 2016-11-09 18:46:31]

The CQ bit was checked by bbudge@chromium.org

[commit-bot: I haz the power, 2016-11-09 18:46:38]

CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-11-09 18:48:59]

Committed patchset #7 (id:140001)

[commit-bot: I haz the power, 2016-11-17 22:27:59]

Description was changed from

==========
[Turbofan] Reduce register allocation work when we can.
- Track representations of virtual registers in InstructionSequence.
- Skip extra aliasing work when no floats or SIMD registers are used.

LOG=N
BUG=v8:4124
==========

to

==========
[Turbofan] Reduce register allocation work when we can.
- Track representations of virtual registers in InstructionSequence.
- Skip extra aliasing work when no floats or SIMD registers are used.

LOG=N
BUG=v8:4124

Committed: https://crrev.com/472cb045c5a809efa7572213362ef2c57b04946d
Cr-Commit-Position: refs/heads/master@{#40870}
==========

[commit-bot: I haz the power, 2016-11-17 22:28:01]

Patchset 7 (id:??) landed as
https://crrev.com/472cb045c5a809efa7572213362ef2c57b04946d
Cr-Commit-Position: refs/heads/master@{#40870}