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| 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 181 void div(const Operand *OpRs, const Operand *OpRt); | 181 void div(const Operand *OpRs, const Operand *OpRt); |
| 182 | 182 |
| 183 void div_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); | 183 void div_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); |
| 184 | 184 |
| 185 void div_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); | 185 void div_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); |
| 186 | 186 |
| 187 void divu(const Operand *OpRs, const Operand *OpRt); | 187 void divu(const Operand *OpRs, const Operand *OpRt); |
| 188 | 188 |
| 189 void jal(const ConstantRelocatable *Target); | 189 void jal(const ConstantRelocatable *Target); |
| 190 | 190 |
| 191 void jalr(const Operand *OpRs, const Operand *OpRd); |
| 192 |
| 191 void lui(const Operand *OpRt, const Operand *OpImm, const RelocOp Reloc); | 193 void lui(const Operand *OpRt, const Operand *OpImm, const RelocOp Reloc); |
| 192 | 194 |
| 193 void ldc1(const Operand *OpRt, const Operand *OpBase, const Operand *OpOff, | 195 void ldc1(const Operand *OpRt, const Operand *OpBase, const Operand *OpOff, |
| 194 const RelocOp Reloc); | 196 const RelocOp Reloc); |
| 195 | 197 |
| 196 void lw(const Operand *OpRt, const Operand *OpBase, const uint32_t Offset); | 198 void lw(const Operand *OpRt, const Operand *OpBase, const uint32_t Offset); |
| 197 | 199 |
| 198 void lwc1(const Operand *OpRt, const Operand *OpBase, const Operand *OpOff, | 200 void lwc1(const Operand *OpRt, const Operand *OpBase, const Operand *OpOff, |
| 199 const RelocOp Reloc); | 201 const RelocOp Reloc); |
| 200 | 202 |
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| 380 void emitInst(IValueT Value) { | 382 void emitInst(IValueT Value) { |
| 381 AssemblerBuffer::EnsureCapacity _(&Buffer); | 383 AssemblerBuffer::EnsureCapacity _(&Buffer); |
| 382 Buffer.emit<IValueT>(Value); | 384 Buffer.emit<IValueT>(Value); |
| 383 } | 385 } |
| 384 }; | 386 }; |
| 385 | 387 |
| 386 } // end of namespace MIPS32 | 388 } // end of namespace MIPS32 |
| 387 } // end of namespace Ice | 389 } // end of namespace Ice |
| 388 | 390 |
| 389 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H | 391 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H |
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