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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 108 // order. | 108 // order. |
| 109 // | 109 // |
| 110 // 3) By not using an enum, we are possibly preventing the compiler from | 110 // 3) By not using an enum, we are possibly preventing the compiler from |
| 111 // doing certain constant folds, which may significantly reduce the | 111 // doing certain constant folds, which may significantly reduce the |
| 112 // code generated for some assembly instructions (because they boil down | 112 // code generated for some assembly instructions (because they boil down |
| 113 // to a few constants). If this is a problem, we could change the code | 113 // to a few constants). If this is a problem, we could change the code |
| 114 // such that we use an enum in optimized mode, and the struct in debug | 114 // such that we use an enum in optimized mode, and the struct in debug |
| 115 // mode. This way we get the compile-time error checking in debug mode | 115 // mode. This way we get the compile-time error checking in debug mode |
| 116 // and best performance in optimized code. | 116 // and best performance in optimized code. |
| 117 | 117 |
| 118 // These constants are used in several locations, including static initializers |
| 119 const int kRegister_no_reg_Code = -1; |
| 120 const int kRegister_r0_Code = 0; |
| 121 const int kRegister_r1_Code = 1; |
| 122 const int kRegister_r2_Code = 2; |
| 123 const int kRegister_r3_Code = 3; |
| 124 const int kRegister_r4_Code = 4; |
| 125 const int kRegister_r5_Code = 5; |
| 126 const int kRegister_r6_Code = 6; |
| 127 const int kRegister_r7_Code = 7; |
| 128 const int kRegister_r8_Code = 8; |
| 129 const int kRegister_r9_Code = 9; |
| 130 const int kRegister_r10_Code = 10; |
| 131 const int kRegister_fp_Code = 11; |
| 132 const int kRegister_ip_Code = 12; |
| 133 const int kRegister_sp_Code = 13; |
| 134 const int kRegister_lr_Code = 14; |
| 135 const int kRegister_pc_Code = 15; |
| 136 |
| 118 // Core register | 137 // Core register |
| 119 struct Register { | 138 struct Register { |
| 120 static const int kNumRegisters = 16; | 139 static const int kNumRegisters = 16; |
| 121 static const int kMaxNumAllocatableRegisters = | 140 static const int kMaxNumAllocatableRegisters = |
| 122 FLAG_enable_ool_constant_pool ? 7 : 8; | 141 FLAG_enable_ool_constant_pool ? 8 : 9; |
| 123 static const int kSizeInBytes = 4; | 142 static const int kSizeInBytes = 4; |
| 124 | 143 |
| 125 inline static int NumAllocatableRegisters(); | 144 inline static int NumAllocatableRegisters(); |
| 126 | 145 |
| 127 static int ToAllocationIndex(Register reg) { | 146 static int ToAllocationIndex(Register reg) { |
| 147 if (FLAG_enable_ool_constant_pool && (reg.code() >= kRegister_r8_Code)) { |
| 148 return reg.code() - 1; |
| 149 } |
| 128 ASSERT(reg.code() < kMaxNumAllocatableRegisters); | 150 ASSERT(reg.code() < kMaxNumAllocatableRegisters); |
| 129 return reg.code(); | 151 return reg.code(); |
| 130 } | 152 } |
| 131 | 153 |
| 132 static Register FromAllocationIndex(int index) { | 154 static Register FromAllocationIndex(int index) { |
| 133 ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters); | 155 ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters); |
| 156 if (FLAG_enable_ool_constant_pool && (index >= 7)) { |
| 157 return from_code(index + 1); |
| 158 } |
| 134 return from_code(index); | 159 return from_code(index); |
| 135 } | 160 } |
| 136 | 161 |
| 137 static const char* AllocationIndexToString(int index) { | 162 static const char* AllocationIndexToString(int index) { |
| 138 ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters); | 163 ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters); |
| 139 const char* const names[] = { | 164 const char* const names[] = { |
| 140 "r0", | 165 "r0", |
| 141 "r1", | 166 "r1", |
| 142 "r2", | 167 "r2", |
| 143 "r3", | 168 "r3", |
| 144 "r4", | 169 "r4", |
| 145 "r5", | 170 "r5", |
| 146 "r6", | 171 "r6", |
| 147 "r7", | 172 "r7", |
| 173 "r8", |
| 148 }; | 174 }; |
| 175 if (FLAG_enable_ool_constant_pool && (index >= 7)) { |
| 176 return names[index + 1]; |
| 177 } |
| 149 return names[index]; | 178 return names[index]; |
| 150 } | 179 } |
| 151 | 180 |
| 152 static Register from_code(int code) { | 181 static Register from_code(int code) { |
| 153 Register r = { code }; | 182 Register r = { code }; |
| 154 return r; | 183 return r; |
| 155 } | 184 } |
| 156 | 185 |
| 157 bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } | 186 bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } |
| 158 bool is(Register reg) const { return code_ == reg.code_; } | 187 bool is(Register reg) const { return code_ == reg.code_; } |
| 159 int code() const { | 188 int code() const { |
| 160 ASSERT(is_valid()); | 189 ASSERT(is_valid()); |
| 161 return code_; | 190 return code_; |
| 162 } | 191 } |
| 163 int bit() const { | 192 int bit() const { |
| 164 ASSERT(is_valid()); | 193 ASSERT(is_valid()); |
| 165 return 1 << code_; | 194 return 1 << code_; |
| 166 } | 195 } |
| 167 | 196 |
| 168 void set_code(int code) { | 197 void set_code(int code) { |
| 169 code_ = code; | 198 code_ = code; |
| 170 ASSERT(is_valid()); | 199 ASSERT(is_valid()); |
| 171 } | 200 } |
| 172 | 201 |
| 173 // Unfortunately we can't make this private in a struct. | 202 // Unfortunately we can't make this private in a struct. |
| 174 int code_; | 203 int code_; |
| 175 }; | 204 }; |
| 176 | 205 |
| 177 // These constants are used in several locations, including static initializers | |
| 178 const int kRegister_no_reg_Code = -1; | |
| 179 const int kRegister_r0_Code = 0; | |
| 180 const int kRegister_r1_Code = 1; | |
| 181 const int kRegister_r2_Code = 2; | |
| 182 const int kRegister_r3_Code = 3; | |
| 183 const int kRegister_r4_Code = 4; | |
| 184 const int kRegister_r5_Code = 5; | |
| 185 const int kRegister_r6_Code = 6; | |
| 186 const int kRegister_r7_Code = 7; | |
| 187 const int kRegister_r8_Code = 8; | |
| 188 const int kRegister_r9_Code = 9; | |
| 189 const int kRegister_r10_Code = 10; | |
| 190 const int kRegister_fp_Code = 11; | |
| 191 const int kRegister_ip_Code = 12; | |
| 192 const int kRegister_sp_Code = 13; | |
| 193 const int kRegister_lr_Code = 14; | |
| 194 const int kRegister_pc_Code = 15; | |
| 195 | |
| 196 const Register no_reg = { kRegister_no_reg_Code }; | 206 const Register no_reg = { kRegister_no_reg_Code }; |
| 197 | 207 |
| 198 const Register r0 = { kRegister_r0_Code }; | 208 const Register r0 = { kRegister_r0_Code }; |
| 199 const Register r1 = { kRegister_r1_Code }; | 209 const Register r1 = { kRegister_r1_Code }; |
| 200 const Register r2 = { kRegister_r2_Code }; | 210 const Register r2 = { kRegister_r2_Code }; |
| 201 const Register r3 = { kRegister_r3_Code }; | 211 const Register r3 = { kRegister_r3_Code }; |
| 202 const Register r4 = { kRegister_r4_Code }; | 212 const Register r4 = { kRegister_r4_Code }; |
| 203 const Register r5 = { kRegister_r5_Code }; | 213 const Register r5 = { kRegister_r5_Code }; |
| 204 const Register r6 = { kRegister_r6_Code }; | 214 const Register r6 = { kRegister_r6_Code }; |
| 205 // Used as constant pool pointer register if FLAGS_enable_ool_constant_pool. | 215 // Used as constant pool pointer register if FLAG_enable_ool_constant_pool. |
| 206 const Register r7 = { kRegister_r7_Code }; | 216 const Register r7 = { kRegister_r7_Code }; |
| 207 // Used as context register. | 217 // Used as context register. |
| 208 const Register r8 = { kRegister_r8_Code }; | 218 const Register r8 = { kRegister_r8_Code }; |
| 209 // Used as lithium codegen scratch register. | 219 // Used as lithium codegen scratch register. |
| 210 const Register r9 = { kRegister_r9_Code }; | 220 const Register r9 = { kRegister_r9_Code }; |
| 211 // Used as roots register. | 221 // Used as roots register. |
| 212 const Register r10 = { kRegister_r10_Code }; | 222 const Register r10 = { kRegister_r10_Code }; |
| 213 const Register fp = { kRegister_fp_Code }; | 223 const Register fp = { kRegister_fp_Code }; |
| 214 const Register ip = { kRegister_ip_Code }; | 224 const Register ip = { kRegister_ip_Code }; |
| 215 const Register sp = { kRegister_sp_Code }; | 225 const Register sp = { kRegister_sp_Code }; |
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| 1578 public: | 1588 public: |
| 1579 explicit EnsureSpace(Assembler* assembler) { | 1589 explicit EnsureSpace(Assembler* assembler) { |
| 1580 assembler->CheckBuffer(); | 1590 assembler->CheckBuffer(); |
| 1581 } | 1591 } |
| 1582 }; | 1592 }; |
| 1583 | 1593 |
| 1584 | 1594 |
| 1585 } } // namespace v8::internal | 1595 } } // namespace v8::internal |
| 1586 | 1596 |
| 1587 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1597 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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