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1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. | 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "base/cpu.h" | 5 #include "base/cpu.h" |
6 #include "build/build_config.h" | 6 #include "build/build_config.h" |
7 | 7 |
8 #include "testing/gtest/include/gtest/gtest.h" | 8 #include "testing/gtest/include/gtest/gtest.h" |
9 | 9 |
10 #if _MSC_VER >= 1700 | 10 #if _MSC_VER >= 1700 |
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50 if (cpu.has_sse41()) { | 50 if (cpu.has_sse41()) { |
51 // Execute an SSE 4.1 instruction. | 51 // Execute an SSE 4.1 instruction. |
52 __asm__ __volatile__("pmuldq %%xmm0, %%xmm0\n" : : : "xmm0"); | 52 __asm__ __volatile__("pmuldq %%xmm0, %%xmm0\n" : : : "xmm0"); |
53 } | 53 } |
54 | 54 |
55 if (cpu.has_sse42()) { | 55 if (cpu.has_sse42()) { |
56 // Execute an SSE 4.2 instruction. | 56 // Execute an SSE 4.2 instruction. |
57 __asm__ __volatile__("crc32 %%eax, %%eax\n" : : : "eax"); | 57 __asm__ __volatile__("crc32 %%eax, %%eax\n" : : : "eax"); |
58 } | 58 } |
59 | 59 |
| 60 if (cpu.has_popcnt()) { |
| 61 // Execute a POPCNT instruction. |
| 62 __asm__ __volatile__("popcnt %%eax, %%eax\n" : : : "eax"); |
| 63 } |
| 64 |
60 if (cpu.has_avx()) { | 65 if (cpu.has_avx()) { |
61 // Execute an AVX instruction. | 66 // Execute an AVX instruction. |
62 __asm__ __volatile__("vzeroupper\n" : : : "xmm0"); | 67 __asm__ __volatile__("vzeroupper\n" : : : "xmm0"); |
63 } | 68 } |
64 | 69 |
65 if (cpu.has_avx2()) { | 70 if (cpu.has_avx2()) { |
66 // Execute an AVX 2 instruction. | 71 // Execute an AVX 2 instruction. |
67 __asm__ __volatile__("vpunpcklbw %%ymm0, %%ymm0, %%ymm0\n" : : : "xmm0"); | 72 __asm__ __volatile__("vpunpcklbw %%ymm0, %%ymm0, %%ymm0\n" : : : "xmm0"); |
68 } | 73 } |
69 | 74 |
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93 if (cpu.has_sse41()) { | 98 if (cpu.has_sse41()) { |
94 // Execute an SSE 4.1 instruction. | 99 // Execute an SSE 4.1 instruction. |
95 __asm pmuldq xmm0, xmm0; | 100 __asm pmuldq xmm0, xmm0; |
96 } | 101 } |
97 | 102 |
98 if (cpu.has_sse42()) { | 103 if (cpu.has_sse42()) { |
99 // Execute an SSE 4.2 instruction. | 104 // Execute an SSE 4.2 instruction. |
100 __asm crc32 eax, eax; | 105 __asm crc32 eax, eax; |
101 } | 106 } |
102 | 107 |
| 108 if (cpu.has_popcnt()) { |
| 109 // Execute a POPCNT instruction. |
| 110 __asm popcnt eax, eax; |
| 111 } |
| 112 |
103 // Visual C 2012 required for AVX. | 113 // Visual C 2012 required for AVX. |
104 #if _MSC_VER >= 1700 | 114 #if _MSC_VER >= 1700 |
105 if (cpu.has_avx()) { | 115 if (cpu.has_avx()) { |
106 // Execute an AVX instruction. | 116 // Execute an AVX instruction. |
107 __asm vzeroupper; | 117 __asm vzeroupper; |
108 } | 118 } |
109 | 119 |
110 if (cpu.has_avx2()) { | 120 if (cpu.has_avx2()) { |
111 // Execute an AVX 2 instruction. | 121 // Execute an AVX 2 instruction. |
112 __asm vpunpcklbw ymm0, ymm0, ymm0 | 122 __asm vpunpcklbw ymm0, ymm0, ymm0 |
113 } | 123 } |
114 #endif // _MSC_VER >= 1700 | 124 #endif // _MSC_VER >= 1700 |
115 #endif // defined(COMPILER_GCC) | 125 #endif // defined(COMPILER_GCC) |
116 #endif // defined(ARCH_CPU_X86_FAMILY) | 126 #endif // defined(ARCH_CPU_X86_FAMILY) |
117 } | 127 } |
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