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| 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. | 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "base/cpu.h" | 5 #include "base/cpu.h" |
| 6 #include "build/build_config.h" | 6 #include "build/build_config.h" |
| 7 | 7 |
| 8 #include "testing/gtest/include/gtest/gtest.h" | 8 #include "testing/gtest/include/gtest/gtest.h" |
| 9 | 9 |
| 10 #if _MSC_VER >= 1700 | 10 #if _MSC_VER >= 1700 |
| 11 // C4752: found Intel(R) Advanced Vector Extensions; consider using /arch:AVX. | 11 // C4752: found Intel(R) Advanced Vector Extensions; consider using /arch:AVX. |
| 12 #pragma warning(disable: 4752) | 12 #pragma warning(disable: 4752) |
| 13 #endif | 13 #endif |
| 14 | 14 |
| 15 // Tests whether we can run extended instructions represented by the CPU | 15 // Tests whether we can run extended instructions represented by the CPU |
| 16 // information. This test actually executes some extended instructions (such as | 16 // information. This test actually executes some extended instructions (such as |
| 17 // MMX, SSE, etc.) supported by the CPU and sees we can run them without | 17 // MMX, SSE, etc.) supported by the CPU and sees we can run them without |
| 18 // "undefined instruction" exceptions. That is, this test succeeds when this | 18 // "undefined instruction" exceptions. That is, this test succeeds when this |
| 19 // test finishes without a crash. | 19 // test finishes without a crash. |
| 20 TEST(CPU, RunExtendedInstructions) { | 20 TEST(CPU, RunExtendedInstructions) { |
| 21 #if defined(ARCH_CPU_X86_FAMILY) | 21 #if defined(ARCH_CPU_X86_FAMILY) |
| 22 // Retrieve the CPU information. | 22 // Retrieve the CPU information. |
| 23 base::CPU cpu; | 23 base::CPU cpu; |
| 24 | 24 |
| 25 ASSERT_TRUE(cpu.has_mmx()); | 25 ASSERT_TRUE(cpu.has_mmx()); |
| 26 ASSERT_TRUE(cpu.has_sse()); | 26 ASSERT_TRUE(cpu.has_sse()); |
| 27 ASSERT_TRUE(cpu.has_sse2()); | 27 ASSERT_TRUE(cpu.has_sse2()); |
| 28 | 28 |
| 29 // GCC and clang instruction test. | 29 // GCC and clang instruction test. |
| 30 #if defined(COMPILER_GCC) | 30 #if defined(COMPILER_GCC) |
|
Mark Mentovai
2016/10/30 15:37:55
Test popcnt up here in the gcc/clang branch.
| |
| 31 // Execute an MMX instruction. | 31 // Execute an MMX instruction. |
| 32 __asm__ __volatile__("emms\n" : : : "mm0"); | 32 __asm__ __volatile__("emms\n" : : : "mm0"); |
| 33 | 33 |
| 34 // Execute an SSE instruction. | 34 // Execute an SSE instruction. |
| 35 __asm__ __volatile__("xorps %%xmm0, %%xmm0\n" : : : "xmm0"); | 35 __asm__ __volatile__("xorps %%xmm0, %%xmm0\n" : : : "xmm0"); |
| 36 | 36 |
| 37 // Execute an SSE 2 instruction. | 37 // Execute an SSE 2 instruction. |
| 38 __asm__ __volatile__("psrldq $0, %%xmm0\n" : : : "xmm0"); | 38 __asm__ __volatile__("psrldq $0, %%xmm0\n" : : : "xmm0"); |
| 39 | 39 |
| 40 if (cpu.has_sse3()) { | 40 if (cpu.has_sse3()) { |
| (...skipping 52 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 93 if (cpu.has_sse41()) { | 93 if (cpu.has_sse41()) { |
| 94 // Execute an SSE 4.1 instruction. | 94 // Execute an SSE 4.1 instruction. |
| 95 __asm pmuldq xmm0, xmm0; | 95 __asm pmuldq xmm0, xmm0; |
| 96 } | 96 } |
| 97 | 97 |
| 98 if (cpu.has_sse42()) { | 98 if (cpu.has_sse42()) { |
| 99 // Execute an SSE 4.2 instruction. | 99 // Execute an SSE 4.2 instruction. |
| 100 __asm crc32 eax, eax; | 100 __asm crc32 eax, eax; |
| 101 } | 101 } |
| 102 | 102 |
| 103 if (cpu.has_popcnt()) { | |
| 104 // Execute a POPCNT instruction. | |
| 105 __asm popcnt eax, eax; | |
| 106 } | |
| 107 | |
| 103 // Visual C 2012 required for AVX. | 108 // Visual C 2012 required for AVX. |
| 104 #if _MSC_VER >= 1700 | 109 #if _MSC_VER >= 1700 |
| 105 if (cpu.has_avx()) { | 110 if (cpu.has_avx()) { |
| 106 // Execute an AVX instruction. | 111 // Execute an AVX instruction. |
| 107 __asm vzeroupper; | 112 __asm vzeroupper; |
| 108 } | 113 } |
| 109 | 114 |
| 110 if (cpu.has_avx2()) { | 115 if (cpu.has_avx2()) { |
| 111 // Execute an AVX 2 instruction. | 116 // Execute an AVX 2 instruction. |
| 112 __asm vpunpcklbw ymm0, ymm0, ymm0 | 117 __asm vpunpcklbw ymm0, ymm0, ymm0 |
| 113 } | 118 } |
| 114 #endif // _MSC_VER >= 1700 | 119 #endif // _MSC_VER >= 1700 |
| 115 #endif // defined(COMPILER_GCC) | 120 #endif // defined(COMPILER_GCC) |
| 116 #endif // defined(ARCH_CPU_X86_FAMILY) | 121 #endif // defined(ARCH_CPU_X86_FAMILY) |
| 117 } | 122 } |
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