[Turbofan] SIMD tests for Int32x4Add, Sub, ReplaceLane.

src/compiler/arm/instruction-selector-arm.cc

Index: src/compiler/arm/instruction-selector-arm.cc
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc
index 3ddf46c5a02aa78e12b9701a6e49df1e132e2bb3..def486af620f1a5da19e805f86cd913b6eba9607 100644
--- a/src/compiler/arm/instruction-selector-arm.cc
+++ b/src/compiler/arm/instruction-selector-arm.cc
@@ -2318,6 +2318,18 @@ void InstructionSelector::VisitFloat32x4FromUint32x4(Node* node) {
        g.UseRegister(node->InputAt(0)));
 }
 
+void InstructionSelector::VisitFloat32x4Abs(Node* node) {
+  ArmOperandGenerator g(this);
+  Emit(kArmFloat32x4Abs, g.DefineAsRegister(node),
+       g.UseRegister(node->InputAt(0)));
+}
+
+void InstructionSelector::VisitFloat32x4Neg(Node* node) {
+  ArmOperandGenerator g(this);
+  Emit(kArmFloat32x4Neg, g.DefineAsRegister(node),
+       g.UseRegister(node->InputAt(0)));
+}
+
 void InstructionSelector::VisitFloat32x4Add(Node* node) {
   ArmOperandGenerator g(this);
   Emit(kArmFloat32x4Add, g.DefineAsRegister(node),
@@ -2330,6 +2342,18 @@ void InstructionSelector::VisitFloat32x4Sub(Node* node) {
        g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
 }
 
+void InstructionSelector::VisitFloat32x4Equal(Node* node) {
+  ArmOperandGenerator g(this);
+  Emit(kArmFloat32x4Eq, g.DefineAsRegister(node),
+       g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
+}
+
+void InstructionSelector::VisitFloat32x4NotEqual(Node* node) {
+  ArmOperandGenerator g(this);
+  Emit(kArmFloat32x4Ne, g.DefineAsRegister(node),
+       g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
+}
+
 void InstructionSelector::VisitCreateInt32x4(Node* node) {
   ArmOperandGenerator g(this);
   Emit(kArmInt32x4Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0)));