[Turbofan] SIMD tests for Int32x4Add, Sub, ReplaceLane.

src/arm/disasm-arm.cc

Index: src/arm/disasm-arm.cc
diff --git a/src/arm/disasm-arm.cc b/src/arm/disasm-arm.cc
index ef99d531a007f9e05e177ff6079c53d579b7cd8e..f0041aab25a6fac05138f051abc1843fdc21380e 100644
--- a/src/arm/disasm-arm.cc
+++ b/src/arm/disasm-arm.cc
@@ -1892,6 +1892,14 @@ void Decoder::DecodeSpecialCondition(Instruction* instr) {
         // vmul.i<size> Qd, Qm, Qn.
         out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
                                     "vmul.i%d q%d, q%d, q%d", size, Vd, Vn, Vm);
+      } else if (instr->Bits(21, 20) == 0 && instr->Bits(11, 8) == 0xe &&
+                 instr->Bit(4) == 0) {
+        int Vd = instr->VFPDRegValue(kSimd128Precision);
+        int Vm = instr->VFPMRegValue(kSimd128Precision);
+        int Vn = instr->VFPNRegValue(kSimd128Precision);
+        // vceq.f32 Qd, Qm, Qn.
+        out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+                                    "vceq.f32 q%d, q%d, q%d", Vd, Vn, Vm);
       } else {
         Unknown(instr);
       }