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Issue 2454193002: [Turbofan] SIMD tests for Int32x4Add, Sub, ReplaceLane. (Closed)
Patch Set: Pass expected value in to Wasm code. Created 4 years, 1 month ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/compilation-info.h" 7 #include "src/compilation-info.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
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2115 XMMRegister dst = i.OutputSimd128Register(); 2115 XMMRegister dst = i.OutputSimd128Register();
2116 __ Movd(dst, i.InputRegister(0)); 2116 __ Movd(dst, i.InputRegister(0));
2117 __ shufps(dst, dst, 0x0); 2117 __ shufps(dst, dst, 0x0);
2118 break; 2118 break;
2119 } 2119 }
2120 case kX64Int32x4ExtractLane: { 2120 case kX64Int32x4ExtractLane: {
2121 CpuFeatureScope sse_scope(masm(), SSE4_1); 2121 CpuFeatureScope sse_scope(masm(), SSE4_1);
2122 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); 2122 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));
2123 break; 2123 break;
2124 } 2124 }
2125 case kX64Int32x4ReplaceLane: {
2126 CpuFeatureScope sse_scope(masm(), SSE4_1);
2127 XMMRegister dst = i.OutputSimd128Register();
2128 if (instr->InputAt(2)->IsRegister()) {
2129 __ Pinsrd(i.InputSimd128Register(0), i.InputRegister(2),
2130 i.InputInt8(1));
2131 } else {
2132 __ Pinsrd(i.InputSimd128Register(0), i.InputOperand(2), i.InputInt8(1));
2133 }
2134 __ Movups(dst, i.InputSimd128Register(0));
2135 break;
2136 }
2137 case kX64Int32x4Add: {
2138 CpuFeatureScope sse_scope(masm(), SSE4_1);
2139 XMMRegister dst = i.OutputSimd128Register();
2140 __ paddd(i.InputSimd128Register(0), i.InputSimd128Register(1));
2141 __ Movups(dst, i.InputSimd128Register(0));
2142 break;
2143 }
2144 case kX64Int32x4Sub: {
2145 CpuFeatureScope sse_scope(masm(), SSE4_1);
2146 XMMRegister dst = i.OutputSimd128Register();
2147 __ psubd(i.InputSimd128Register(0), i.InputSimd128Register(1));
2148 __ Movups(dst, i.InputSimd128Register(0));
2149 break;
2150 }
2125 case kCheckedLoadInt8: 2151 case kCheckedLoadInt8:
2126 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl); 2152 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl);
2127 break; 2153 break;
2128 case kCheckedLoadUint8: 2154 case kCheckedLoadUint8:
2129 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl); 2155 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl);
2130 break; 2156 break;
2131 case kCheckedLoadInt16: 2157 case kCheckedLoadInt16:
2132 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl); 2158 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl);
2133 break; 2159 break;
2134 case kCheckedLoadUint16: 2160 case kCheckedLoadUint16:
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2753 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc; 2779 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
2754 __ Nop(padding_size); 2780 __ Nop(padding_size);
2755 } 2781 }
2756 } 2782 }
2757 2783
2758 #undef __ 2784 #undef __
2759 2785
2760 } // namespace compiler 2786 } // namespace compiler
2761 } // namespace internal 2787 } // namespace internal
2762 } // namespace v8 2788 } // namespace v8
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