tests_lit/llvm2ice_tests/vector-arith.ll - Issue 2448193008: Subzero, MIPS32: Enable MIPS support in lit tests

Unified Diff: tests_lit/llvm2ice_tests/vector-arith.ll

Issue 2448193008: Subzero, MIPS32: Enable MIPS support in lit tests (Closed)

Patch Set: Created 4 years, 2 months ago

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Index: tests_lit/llvm2ice_tests/vector-arith.ll

diff --git a/tests_lit/llvm2ice_tests/vector-arith.ll b/tests_lit/llvm2ice_tests/vector-arith.ll

index abf09e21b2475a17b08d24332942fe66f15cacb5..a1b3126efe6587da128d0bb3c30f52ccef0e2cbf 100644

--- a/tests_lit/llvm2ice_tests/vector-arith.ll

+++ b/tests_lit/llvm2ice_tests/vector-arith.ll

@@ -9,12 +9,23 @@

; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 -mattr=sse4.1 \

; RUN: | FileCheck --check-prefix=SSE41 %s

+; RUN: %if --need=target_MIPS32 --need=allow_dump \

+; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \

+; RUN: mips32 -i %s --args -O2 -allow-externally-defined-symbols \

+; RUN: | %if --need=target_MIPS32 --need=allow_dump \

+; RUN: --command FileCheck --check-prefix MIPS32 %s

define internal <4 x float> @test_fadd(<4 x float> %arg0, <4 x float> %arg1) {

entry:

%res = fadd <4 x float> %arg0, %arg1

ret <4 x float> %res

; CHECK-LABEL: test_fadd

; CHECK: addps

+; MIPS32-LABEL: test_fadd

+; MIPS32: add.s

}

define internal <4 x float> @test_fsub(<4 x float> %arg0, <4 x float> %arg1) {

@@ -23,6 +34,11 @@ entry:

ret <4 x float> %res

; CHECK-LABEL: test_fsub

; CHECK: subps

+; MIPS32-LABEL: test_fsub

+; MIPS32: sub.s

}

define internal <4 x float> @test_fmul(<4 x float> %arg0, <4 x float> %arg1) {

@@ -31,6 +47,11 @@ entry:

ret <4 x float> %res

; CHECK-LABEL: test_fmul

; CHECK: mulps

+; MIPS32-LABEL: test_fmul

+; MIPS32: mul.s

}

define internal <4 x float> @test_fdiv(<4 x float> %arg0, <4 x float> %arg1) {

@@ -39,6 +60,11 @@ entry:

ret <4 x float> %res

; CHECK-LABEL: test_fdiv

; CHECK: divps

+; MIPS32-LABEL: test_fdiv

+; MIPS32: div.s

}

define internal <4 x float> @test_frem(<4 x float> %arg0, <4 x float> %arg1) {

@@ -58,6 +84,23 @@ entry:

ret <16 x i8> %res

; CHECK-LABEL: test_add_v16i8

; CHECK: paddb

+; MIPS32-LABEL: test_add_v16i8

+; MIPS32: addu

}

define internal <16 x i8> @test_and_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -66,6 +109,23 @@ entry:

ret <16 x i8> %res

; CHECK-LABEL: test_and_v16i8

; CHECK: pand

+; MIPS32-LABEL: test_and_v16i8

+; MIPS32: and

}

define internal <16 x i8> @test_or_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -74,6 +134,23 @@ entry:

ret <16 x i8> %res

; CHECK-LABEL: test_or_v16i8

; CHECK: por

+; MIPS32-LABEL: test_or_v16i8

+; MIPS32: or

}

define internal <16 x i8> @test_xor_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -82,6 +159,23 @@ entry:

ret <16 x i8> %res

; CHECK-LABEL: test_xor_v16i8

; CHECK: pxor

+; MIPS32-LABEL: test_xor_v16i8

+; MIPS32: xor

}

define internal <16 x i8> @test_sub_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -90,6 +184,23 @@ entry:

ret <16 x i8> %res

; CHECK-LABEL: test_sub_v16i8

; CHECK: psubb

+; MIPS32-LABEL: test_sub_v16i8

+; MIPS32: subu

}

define internal <16 x i8> @test_mul_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -113,6 +224,23 @@ entry:

; CHECK: imul

+; MIPS32-LABEL: test_mul_v16i8

+; MIPS32: mul

}

define internal <16 x i8> @test_shl_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -136,6 +264,23 @@ entry:

; CHECK: shl

+; MIPS32-LABEL: test_shl_v16i8

+; MIPS32: sllv

}

define internal <16 x i8> @test_lshr_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -159,6 +304,23 @@ entry:

; CHECK: shr

+; MIPS32-LABEL: test_lshr_v16i8

+; MIPS32: srlv

}

define internal <16 x i8> @test_ashr_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -182,6 +344,23 @@ entry:

; CHECK: sar

+; MIPS32-LABEL: test_ashr_v16i8

+; MIPS32: srav

}

define internal <16 x i8> @test_udiv_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -205,6 +384,23 @@ entry:

; CHECK: div

+; MIPS32-LABEL: test_udiv_v16i8

+; MIPS32: divu

}

define internal <16 x i8> @test_sdiv_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -228,6 +424,23 @@ entry:

; CHECK: idiv

+; MIPS32-LABEL: test_sdiv_v16i8

+; MIPS32: div

}

define internal <16 x i8> @test_urem_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -251,6 +464,23 @@ entry:

; CHECK: div

+; MIPS32-LABEL: test_urem_v16i8

+; MIPS32: divu

}

define internal <16 x i8> @test_srem_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) {

@@ -274,6 +504,23 @@ entry:

; CHECK: idiv

+; MIPS32-LABEL: test_srem_v16i8

+; MIPS32: div

}

define internal <8 x i16> @test_add_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -282,6 +529,15 @@ entry:

ret <8 x i16> %res

; CHECK-LABEL: test_add_v8i16

; CHECK: paddw

+; MIPS32-LABEL: test_add_v8i16

+; MIPS32: addu

}

define internal <8 x i16> @test_and_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -290,6 +546,15 @@ entry:

ret <8 x i16> %res

; CHECK-LABEL: test_and_v8i16

; CHECK: pand

+; MIPS32-LABEL: test_and_v8i16

+; MIPS32: andi

}

define internal <8 x i16> @test_or_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -298,6 +563,15 @@ entry:

ret <8 x i16> %res

; CHECK-LABEL: test_or_v8i16

; CHECK: por

+; MIPS32-LABEL: test_or_v8i16

+; MIPS32: or

}

define internal <8 x i16> @test_xor_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -306,6 +580,15 @@ entry:

ret <8 x i16> %res

; CHECK-LABEL: test_xor_v8i16

; CHECK: pxor

+; MIPS32-LABEL: test_xor_v8i16

+; MIPS32: xor

}

define internal <8 x i16> @test_sub_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -314,6 +597,15 @@ entry:

ret <8 x i16> %res

; CHECK-LABEL: test_sub_v8i16

; CHECK: psubw

+; MIPS32-LABEL: test_sub_v8i16

+; MIPS32: subu

}

define internal <8 x i16> @test_mul_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -322,6 +614,15 @@ entry:

ret <8 x i16> %res

; CHECK-LABEL: test_mul_v8i16

; CHECK: pmullw

+; MIPS32-LABEL: test_mul_v8i16

+; MIPS32: mul

}

define internal <8 x i16> @test_shl_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -337,6 +638,15 @@ entry:

; CHECK: shl

+; MIPS32-LABEL: test_shl_v8i16

+; MIPS32: sllv

}

define internal <8 x i16> @test_lshr_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -352,6 +662,15 @@ entry:

; CHECK: shr

+; MIPS32-LABEL: test_lshr_v8i16

+; MIPS32: srlv

}

define internal <8 x i16> @test_ashr_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -367,6 +686,15 @@ entry:

; CHECK: sar

+; MIPS32-LABEL: test_ashr_v8i16

+; MIPS32: srav

}

define internal <8 x i16> @test_udiv_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -382,6 +710,15 @@ entry:

; CHECK: div

+; MIPS32-LABEL: test_udiv_v8i16

+; MIPS32: divu

}

define internal <8 x i16> @test_sdiv_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -397,6 +734,15 @@ entry:

; CHECK: idiv

+; MIPS32-LABEL: test_sdiv_v8i16

+; MIPS32: div

}

define internal <8 x i16> @test_urem_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -412,6 +758,15 @@ entry:

; CHECK: div

+; MIPS32-LABEL: test_urem_v8i16

+; MIPS32: divu

}

define internal <8 x i16> @test_srem_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) {

@@ -427,6 +782,15 @@ entry:

; CHECK: idiv

+; MIPS32-LABEL: test_srem_v8i16

+; MIPS32: div

}

define internal <4 x i32> @test_add_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -435,6 +799,11 @@ entry:

ret <4 x i32> %res

; CHECK-LABEL: test_add_v4i32

; CHECK: paddd

+; MIPS32-LABEL: test_add_v4i32

+; MIPS32: addu

}

define internal <4 x i32> @test_and_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -443,6 +812,11 @@ entry:

ret <4 x i32> %res

; CHECK-LABEL: test_and_v4i32

; CHECK: pand

+; MIPS32-LABEL: test_and_v4i32

+; MIPS32: and

}

define internal <4 x i32> @test_or_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -451,6 +825,11 @@ entry:

ret <4 x i32> %res

; CHECK-LABEL: test_or_v4i32

; CHECK: por

+; MIPS32-LABEL: test_or_v4i32

+; MIPS32: or

}

define internal <4 x i32> @test_xor_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -459,6 +838,11 @@ entry:

ret <4 x i32> %res

; CHECK-LABEL: test_xor_v4i32

; CHECK: pxor

+; MIPS32-LABEL: test_xor_v4i32

+; MIPS32: xor

}

define internal <4 x i32> @test_sub_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -467,6 +851,11 @@ entry:

ret <4 x i32> %res

; CHECK-LABEL: test_sub_v4i32

; CHECK: psubd

+; MIPS32-LABEL: test_sub_v4i32

+; MIPS32: subu

}

define internal <4 x i32> @test_mul_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -479,6 +868,11 @@ entry:

;

; SSE41-LABEL: test_mul_v4i32

; SSE41: pmulld

+; MIPS32-LABEL: test_mul_v4i32

+; MIPS32: mul

}

define internal <4 x i32> @test_shl_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -493,6 +887,11 @@ entry:

; This line is to ensure that pmulld is generated in test_mul_v4i32 above.

; SSE41-LABEL: test_shl_v4i32

+; MIPS32-LABEL: test_shl_v4i32

+; MIPS32: sllv

}

define internal <4 x i32> @test_lshr_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -504,6 +903,11 @@ entry:

; CHECK: shr

+; MIPS32-LABEL: test_lshr_v4i32

+; MIPS32: srlv

}

define internal <4 x i32> @test_ashr_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -515,6 +919,11 @@ entry:

; CHECK: sar

+; MIPS32-LABEL: test_ashr_v4i32

+; MIPS32: srav

}

define internal <4 x i32> @test_udiv_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -526,6 +935,11 @@ entry:

; CHECK: div

+; MIPS32-LABEL: test_udiv_v4i32

+; MIPS32: divu

}

define internal <4 x i32> @test_sdiv_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -537,6 +951,11 @@ entry:

; CHECK: idiv

+; MIPS32-LABEL: test_sdiv_v4i32

+; MIPS32: div

}

define internal <4 x i32> @test_urem_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -548,6 +967,11 @@ entry:

; CHECK: div

+; MIPS32-LABEL: test_urem_v4i32

+; MIPS32: divu

}

define internal <4 x i32> @test_srem_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) {

@@ -559,4 +983,9 @@ entry:

; CHECK: idiv

+; MIPS32-LABEL: test_srem_v4i32

+; MIPS32: div

}

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