OLD | NEW |
1 ; Test the a=b*b lowering sequence which can use a single temporary register | 1 ; Test the a=b*b lowering sequence which can use a single temporary register |
2 ; instead of two registers. | 2 ; instead of two registers. |
3 | 3 |
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
5 ; RUN: --target x8632 -i %s --args -O2 -mattr=sse4.1 \ | 5 ; RUN: --target x8632 -i %s --args -O2 -mattr=sse4.1 \ |
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
7 | 7 |
8 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 8 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
9 ; RUN: --target x8632 -i %s --args -Om1 -mattr=sse4.1 \ | 9 ; RUN: --target x8632 -i %s --args -Om1 -mattr=sse4.1 \ |
10 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 10 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
11 | 11 |
| 12 ; RUN: %if --need=target_MIPS32 --need=allow_dump \ |
| 13 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \ |
| 14 ; RUN: mips32 -i %s --args -O2 -allow-externally-defined-symbols \ |
| 15 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \ |
| 16 ; RUN: --command FileCheck --check-prefix MIPS32 %s |
| 17 |
12 define internal float @Square_float(float %a) { | 18 define internal float @Square_float(float %a) { |
13 entry: | 19 entry: |
14 %result = fmul float %a, %a | 20 %result = fmul float %a, %a |
15 ret float %result | 21 ret float %result |
16 } | 22 } |
17 ; CHECK-LABEL: Square_float | 23 ; CHECK-LABEL: Square_float |
18 ; CHECK: mulss [[REG:xmm.]],[[REG]] | 24 ; CHECK: mulss [[REG:xmm.]],[[REG]] |
| 25 ; MIPS32-LABEL: Square_float |
| 26 ; MIPS32: mov.s |
| 27 ; MIPS32: mul.s |
19 | 28 |
20 define internal double @Square_double(double %a) { | 29 define internal double @Square_double(double %a) { |
21 entry: | 30 entry: |
22 %result = fmul double %a, %a | 31 %result = fmul double %a, %a |
23 ret double %result | 32 ret double %result |
24 } | 33 } |
25 ; CHECK-LABEL: Square_double | 34 ; CHECK-LABEL: Square_double |
26 ; CHECK: mulsd [[REG:xmm.]],[[REG]] | 35 ; CHECK: mulsd [[REG:xmm.]],[[REG]] |
| 36 ; MIPS32-LABEL: Square_double |
| 37 ; MIPS32: mov.d |
| 38 ; MIPS32: mul.d |
27 | 39 |
28 define internal i32 @Square_i32(i32 %a) { | 40 define internal i32 @Square_i32(i32 %a) { |
29 entry: | 41 entry: |
30 %result = mul i32 %a, %a | 42 %result = mul i32 %a, %a |
31 ret i32 %result | 43 ret i32 %result |
32 } | 44 } |
33 ; CHECK-LABEL: Square_i32 | 45 ; CHECK-LABEL: Square_i32 |
34 ; CHECK: imul [[REG:e..]],[[REG]] | 46 ; CHECK: imul [[REG:e..]],[[REG]] |
| 47 ; MIPS32-LABEL: Square_i32 |
| 48 ; MIPS32: move |
| 49 ; MIPS32: mul |
35 | 50 |
36 define internal i32 @Square_i16(i32 %a) { | 51 define internal i32 @Square_i16(i32 %a) { |
37 entry: | 52 entry: |
38 %a.16 = trunc i32 %a to i16 | 53 %a.16 = trunc i32 %a to i16 |
39 %result = mul i16 %a.16, %a.16 | 54 %result = mul i16 %a.16, %a.16 |
40 %result.i32 = sext i16 %result to i32 | 55 %result.i32 = sext i16 %result to i32 |
41 ret i32 %result.i32 | 56 ret i32 %result.i32 |
42 } | 57 } |
43 ; CHECK-LABEL: Square_i16 | 58 ; CHECK-LABEL: Square_i16 |
44 ; CHECK: imul [[REG:..]],[[REG]] | 59 ; CHECK: imul [[REG:..]],[[REG]] |
| 60 ; MIPS32-LABEL: Square_i16 |
| 61 ; MIPS32: move |
| 62 ; MIPS32: mul |
| 63 ; MIPS32: sll |
| 64 ; MIPS32: sra |
45 | 65 |
46 define internal i32 @Square_i8(i32 %a) { | 66 define internal i32 @Square_i8(i32 %a) { |
47 entry: | 67 entry: |
48 %a.8 = trunc i32 %a to i8 | 68 %a.8 = trunc i32 %a to i8 |
49 %result = mul i8 %a.8, %a.8 | 69 %result = mul i8 %a.8, %a.8 |
50 %result.i32 = sext i8 %result to i32 | 70 %result.i32 = sext i8 %result to i32 |
51 ret i32 %result.i32 | 71 ret i32 %result.i32 |
52 } | 72 } |
53 ; CHECK-LABEL: Square_i8 | 73 ; CHECK-LABEL: Square_i8 |
54 ; CHECK: imul al | 74 ; CHECK: imul al |
| 75 ; MIPS32-LABEL: Square_i8 |
| 76 ; MIPS32: move |
| 77 ; MIPS32: mul |
| 78 ; MIPS32: sll |
| 79 ; MIPS32: sra |
55 | 80 |
56 define internal <4 x float> @Square_v4f32(<4 x float> %a) { | 81 define internal <4 x float> @Square_v4f32(<4 x float> %a) { |
57 entry: | 82 entry: |
58 %result = fmul <4 x float> %a, %a | 83 %result = fmul <4 x float> %a, %a |
59 ret <4 x float> %result | 84 ret <4 x float> %result |
60 } | 85 } |
61 ; CHECK-LABEL: Square_v4f32 | 86 ; CHECK-LABEL: Square_v4f32 |
62 ; CHECK: mulps [[REG:xmm.]],[[REG]] | 87 ; CHECK: mulps [[REG:xmm.]],[[REG]] |
63 | 88 |
64 define internal <4 x i32> @Square_v4i32(<4 x i32> %a) { | 89 define internal <4 x i32> @Square_v4i32(<4 x i32> %a) { |
(...skipping 12 matching lines...) Expand all Loading... |
77 ; CHECK-LABEL: Square_v8i16 | 102 ; CHECK-LABEL: Square_v8i16 |
78 ; CHECK: pmullw [[REG:xmm.]],[[REG]] | 103 ; CHECK: pmullw [[REG:xmm.]],[[REG]] |
79 | 104 |
80 define internal <16 x i8> @Square_v16i8(<16 x i8> %a) { | 105 define internal <16 x i8> @Square_v16i8(<16 x i8> %a) { |
81 entry: | 106 entry: |
82 %result = mul <16 x i8> %a, %a | 107 %result = mul <16 x i8> %a, %a |
83 ret <16 x i8> %result | 108 ret <16 x i8> %result |
84 } | 109 } |
85 ; CHECK-LABEL: Square_v16i8 | 110 ; CHECK-LABEL: Square_v16i8 |
86 ; CHECK-NOT: pmul | 111 ; CHECK-NOT: pmul |
OLD | NEW |