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Issue 2448193008: Subzero, MIPS32: Enable MIPS support in lit tests (Closed)
Patch Set: Created 4 years, 1 month ago
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« tests_lit/llvm2ice_tests/64bit.pnacl.ll ('K') | « tests_lit/llvm2ice_tests/commutativity.ll ('k') | tests_lit/llvm2ice_tests/fp.call_ret.ll » ('j') | tests_lit/llvm2ice_tests/fp.call_ret.ll » ('J')
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1 ; Simple test of signed and unsigned integer conversions. 1 ; Simple test of signed and unsigned integer conversions.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 -i %s --args -O2 \ 4 ; RUN: --target x8632 -i %s --args -O2 \
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s
6 6
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
8 ; RUN: --target x8632 -i %s --args -Om1 \ 8 ; RUN: --target x8632 -i %s --args -Om1 \
9 ; RUN: | %if --need=target_X8632 --command FileCheck %s 9 ; RUN: | %if --need=target_X8632 --command FileCheck %s
10 10
11 ; RUN: %if --need=target_ARM32 \ 11 ; RUN: %if --need=target_ARM32 \
12 ; RUN: --command %p2i --filetype=obj \ 12 ; RUN: --command %p2i --filetype=obj \
13 ; RUN: --disassemble --target arm32 -i %s --args -O2 \ 13 ; RUN: --disassemble --target arm32 -i %s --args -O2 \
14 ; RUN: | %if --need=target_ARM32 \ 14 ; RUN: | %if --need=target_ARM32 \
15 ; RUN: --command FileCheck --check-prefix ARM32 %s 15 ; RUN: --command FileCheck --check-prefix ARM32 %s
16 16
17 ; RUN: %if --need=target_ARM32 \ 17 ; RUN: %if --need=target_ARM32 \
18 ; RUN: --command %p2i --filetype=obj \ 18 ; RUN: --command %p2i --filetype=obj \
19 ; RUN: --disassemble --target arm32 -i %s --args -Om1 \ 19 ; RUN: --disassemble --target arm32 -i %s --args -Om1 \
20 ; RUN: | %if --need=target_ARM32 \ 20 ; RUN: | %if --need=target_ARM32 \
21 ; RUN: --command FileCheck --check-prefix ARM32 %s 21 ; RUN: --command FileCheck --check-prefix ARM32 %s
22 22
23 ; RUN: %if --need=target_MIPS32 --need=allow_dump \
24 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \
25 ; RUN: mips32 -i %s --args -O2 -allow-externally-defined-symbols \
26 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \
27 ; RUN: --command FileCheck --check-prefix MIPS32 %s
28
23 @i8v = internal global [1 x i8] zeroinitializer, align 1 29 @i8v = internal global [1 x i8] zeroinitializer, align 1
24 @i16v = internal global [2 x i8] zeroinitializer, align 2 30 @i16v = internal global [2 x i8] zeroinitializer, align 2
25 @i32v = internal global [4 x i8] zeroinitializer, align 4 31 @i32v = internal global [4 x i8] zeroinitializer, align 4
26 @i64v = internal global [8 x i8] zeroinitializer, align 8 32 @i64v = internal global [8 x i8] zeroinitializer, align 8
27 @u8v = internal global [1 x i8] zeroinitializer, align 1 33 @u8v = internal global [1 x i8] zeroinitializer, align 1
28 @u16v = internal global [2 x i8] zeroinitializer, align 2 34 @u16v = internal global [2 x i8] zeroinitializer, align 2
29 @u32v = internal global [4 x i8] zeroinitializer, align 4 35 @u32v = internal global [4 x i8] zeroinitializer, align 4
30 @u64v = internal global [8 x i8] zeroinitializer, align 8 36 @u64v = internal global [8 x i8] zeroinitializer, align 8
31 37
32 define internal void @from_int8() { 38 define internal void @from_int8() {
(...skipping 30 matching lines...) Expand all
63 ; ARM32: strh 69 ; ARM32: strh
64 ; ARM32: sxtb 70 ; ARM32: sxtb
65 ; ARM32: movw {{.*}}i32v 71 ; ARM32: movw {{.*}}i32v
66 ; ARM32: str r 72 ; ARM32: str r
67 ; ARM32: sxtb 73 ; ARM32: sxtb
68 ; ARM32: asr 74 ; ARM32: asr
69 ; ARM32: movw {{.*}}i64v 75 ; ARM32: movw {{.*}}i64v
70 ; ARM32-DAG: str r{{.*}}, [r{{[0-9]+}}] 76 ; ARM32-DAG: str r{{.*}}, [r{{[0-9]+}}]
71 ; ARM32-DAG: str r{{.*}}, [{{.*}}, #4] 77 ; ARM32-DAG: str r{{.*}}, [{{.*}}, #4]
72 78
79 ; MIPS32-LABEL: from_int8
80 ; MIPS32: lui {{.*}} i8v
81 ; MIPS32: addiu {{.*}} i8v
82 ; MIPS32: lb
83 ; MIPS32: move
84 ; MIPS32: sll {{.*}},0x18
85 ; MIPS32: sra {{.*}},0x18
86 ; MIPS32: lui {{.*}} i16v
87 ; MIPS32: addiu {{.*}} i16v
88 ; MIPS32: sh
89 ; MIPS32: move
90 ; MIPS32: sll {{.*}},0x18
91 ; MIPS32: sra {{.*}},0x18
92 ; MIPS32: lui {{.*}} i32v
93 ; MIPS32: addiu {{.*}} i32v
94 ; MIPS32: sw
95 ; MIPS32: sll {{.*}},0x18
96 ; MIPS32: sra {{.*}},0x18
97 ; MIPS32: sra {{.*}},0x1f
98 ; MIPS32: lui {{.*}} i64v
99 ; MIPS32: addiu {{.*}} i64v
100
73 define internal void @from_int16() { 101 define internal void @from_int16() {
74 entry: 102 entry:
75 %__0 = bitcast [2 x i8]* @i16v to i16* 103 %__0 = bitcast [2 x i8]* @i16v to i16*
76 %v0 = load i16, i16* %__0, align 1 104 %v0 = load i16, i16* %__0, align 1
77 %v1 = trunc i16 %v0 to i8 105 %v1 = trunc i16 %v0 to i8
78 %__3 = bitcast [1 x i8]* @i8v to i8* 106 %__3 = bitcast [1 x i8]* @i8v to i8*
79 store i8 %v1, i8* %__3, align 1 107 store i8 %v1, i8* %__3, align 1
80 %v2 = sext i16 %v0 to i32 108 %v2 = sext i16 %v0 to i32
81 %__5 = bitcast [4 x i8]* @i32v to i32* 109 %__5 = bitcast [4 x i8]* @i32v to i32*
82 store i32 %v2, i32* %__5, align 1 110 store i32 %v2, i32* %__5, align 1
(...skipping 17 matching lines...) Expand all
100 ; ARM32: movw {{.*}}i8v 128 ; ARM32: movw {{.*}}i8v
101 ; ARM32: strb 129 ; ARM32: strb
102 ; ARM32: sxth 130 ; ARM32: sxth
103 ; ARM32: movw {{.*}}i32v 131 ; ARM32: movw {{.*}}i32v
104 ; ARM32: str r 132 ; ARM32: str r
105 ; ARM32: sxth 133 ; ARM32: sxth
106 ; ARM32: asr 134 ; ARM32: asr
107 ; ARM32: movw {{.*}}i64v 135 ; ARM32: movw {{.*}}i64v
108 ; ARM32: str r 136 ; ARM32: str r
109 137
138 ; MIPS32-LABEL: from_int16
139 ; MIPS32: lui {{.*}} i16v
140 ; MIPS32: addiu {{.*}} i16v
141 ; MIPS32: lh
142 ; MIPS32: move
143 ; MIPS32: lui {{.*}} i8v
144 ; MIPS32: addiu {{.*}} i8v
145 ; MIPS32: sb
146 ; MIPS32: move
147 ; MIPS32: sll {{.*}},0x10
148 ; MIPS32: sra {{.*}},0x10
149 ; MIPS32: lui {{.*}} i32v
150 ; MIPS32: addiu {{.*}} i32v
151 ; MIPS32: sw
152 ; MIPS32: sll {{.*}},0x10
153 ; MIPS32: sra {{.*}},0x10
154 ; MIPS32: sra {{.*}},0x1f
155 ; MIPS32: lui {{.*}} i64v
156 ; MIPS32: addiu {{.*}} i64v
157
110 define internal void @from_int32() { 158 define internal void @from_int32() {
111 entry: 159 entry:
112 %__0 = bitcast [4 x i8]* @i32v to i32* 160 %__0 = bitcast [4 x i8]* @i32v to i32*
113 %v0 = load i32, i32* %__0, align 1 161 %v0 = load i32, i32* %__0, align 1
114 %v1 = trunc i32 %v0 to i8 162 %v1 = trunc i32 %v0 to i8
115 %__3 = bitcast [1 x i8]* @i8v to i8* 163 %__3 = bitcast [1 x i8]* @i8v to i8*
116 store i8 %v1, i8* %__3, align 1 164 store i8 %v1, i8* %__3, align 1
117 %v2 = trunc i32 %v0 to i16 165 %v2 = trunc i32 %v0 to i16
118 %__5 = bitcast [2 x i8]* @i16v to i16* 166 %__5 = bitcast [2 x i8]* @i16v to i16*
119 store i16 %v2, i16* %__5, align 1 167 store i16 %v2, i16* %__5, align 1
(...skipping 13 matching lines...) Expand all
133 ; ARM32: movw {{.*}}i32v 181 ; ARM32: movw {{.*}}i32v
134 ; ARM32: ldr r 182 ; ARM32: ldr r
135 ; ARM32: movw {{.*}}i8v 183 ; ARM32: movw {{.*}}i8v
136 ; ARM32: strb 184 ; ARM32: strb
137 ; ARM32: movw {{.*}}i16v 185 ; ARM32: movw {{.*}}i16v
138 ; ARM32: strh 186 ; ARM32: strh
139 ; ARM32: asr 187 ; ARM32: asr
140 ; ARM32: movw {{.*}}i64v 188 ; ARM32: movw {{.*}}i64v
141 ; ARM32: str r 189 ; ARM32: str r
142 190
191 ; MIPS32-LABEL: from_int32
192 ; MIPS32: lui {{.*}} i32v
193 ; MIPS32: addiu {{.*}} i32v
194 ; MIPS32: lw
195 ; MIPS32: move
196 ; MIPS32: lui {{.*}} i8v
197 ; MIPS32: addiu {{.*}} i8v
198 ; MIPS32: sb
199 ; MIPS32: move
200 ; MIPS32: lui {{.*}} i16v
201 ; MIPS32: addiu {{.*}} i16v
202 ; MIPS32: sh
203 ; MIPS32: sra {{.*}},0x1f
204 ; MIPS32: lui {{.*}} i64v
205 ; MIPS32: addiu {{.*}} i64v
206
143 define internal void @from_int64() { 207 define internal void @from_int64() {
144 entry: 208 entry:
145 %__0 = bitcast [8 x i8]* @i64v to i64* 209 %__0 = bitcast [8 x i8]* @i64v to i64*
146 %v0 = load i64, i64* %__0, align 1 210 %v0 = load i64, i64* %__0, align 1
147 %v1 = trunc i64 %v0 to i8 211 %v1 = trunc i64 %v0 to i8
148 %__3 = bitcast [1 x i8]* @i8v to i8* 212 %__3 = bitcast [1 x i8]* @i8v to i8*
149 store i8 %v1, i8* %__3, align 1 213 store i8 %v1, i8* %__3, align 1
150 %v2 = trunc i64 %v0 to i16 214 %v2 = trunc i64 %v0 to i16
151 %__5 = bitcast [2 x i8]* @i16v to i16* 215 %__5 = bitcast [2 x i8]* @i16v to i16*
152 store i16 %v2, i16* %__5, align 1 216 store i16 %v2, i16* %__5, align 1
(...skipping 11 matching lines...) Expand all
164 ; ARM32-LABEL: from_int64 228 ; ARM32-LABEL: from_int64
165 ; ARM32: movw {{.*}}i64v 229 ; ARM32: movw {{.*}}i64v
166 ; ARM32: ldr r 230 ; ARM32: ldr r
167 ; ARM32: movw {{.*}}i8v 231 ; ARM32: movw {{.*}}i8v
168 ; ARM32: strb 232 ; ARM32: strb
169 ; ARM32: movw {{.*}}i16v 233 ; ARM32: movw {{.*}}i16v
170 ; ARM32: strh 234 ; ARM32: strh
171 ; ARM32: movw {{.*}}i32v 235 ; ARM32: movw {{.*}}i32v
172 ; ARM32: str r 236 ; ARM32: str r
173 237
238 ; MIPS32-LABEL: from_int64
239 ; MIPS32: lui {{.*}} i64v
240 ; MIPS32: addiu {{.*}} i64v
241 ; MIPS32: lw
242 ; MIPS32: move
243 ; MIPS32: lui {{.*}} i8v
244 ; MIPS32: addiu {{.*}} i8v
245 ; MIPS32: sb
246 ; MIPS32: move
247 ; MIPS32: lui {{.*}} i16v
248 ; MIPS32: addiu {{.*}} i16v
249 ; MIPS32: sh
250 ; MIPS32: lui {{.*}} i32v
251 ; MIPS32: addiu {{.*}} i32v
252
174 define internal void @from_uint8() { 253 define internal void @from_uint8() {
175 entry: 254 entry:
176 %__0 = bitcast [1 x i8]* @u8v to i8* 255 %__0 = bitcast [1 x i8]* @u8v to i8*
177 %v0 = load i8, i8* %__0, align 1 256 %v0 = load i8, i8* %__0, align 1
178 %v1 = zext i8 %v0 to i16 257 %v1 = zext i8 %v0 to i16
179 %__3 = bitcast [2 x i8]* @i16v to i16* 258 %__3 = bitcast [2 x i8]* @i16v to i16*
180 store i16 %v1, i16* %__3, align 1 259 store i16 %v1, i16* %__3, align 1
181 %v2 = zext i8 %v0 to i32 260 %v2 = zext i8 %v0 to i32
182 %__5 = bitcast [4 x i8]* @i32v to i32* 261 %__5 = bitcast [4 x i8]* @i32v to i32*
183 store i32 %v2, i32* %__5, align 1 262 store i32 %v2, i32* %__5, align 1
(...skipping 19 matching lines...) Expand all
203 ; ARM32: movw {{.*}}i16v 282 ; ARM32: movw {{.*}}i16v
204 ; ARM32: strh 283 ; ARM32: strh
205 ; ARM32: uxtb 284 ; ARM32: uxtb
206 ; ARM32: movw {{.*}}i32v 285 ; ARM32: movw {{.*}}i32v
207 ; ARM32: str r 286 ; ARM32: str r
208 ; ARM32: uxtb 287 ; ARM32: uxtb
209 ; ARM32: mov {{.*}}, #0 288 ; ARM32: mov {{.*}}, #0
210 ; ARM32: movw {{.*}}i64v 289 ; ARM32: movw {{.*}}i64v
211 ; ARM32: str r 290 ; ARM32: str r
212 291
292 ; MIPS32-LABEL: from_uint8
293 ; MIPS32: lui {{.*}} u8v
294 ; MIPS32: addiu {{.*}} u8v
295 ; MIPS32: lb
296 ; MIPS32: move
297 ; MIPS32: andi {{.*}},0xff
298 ; MIPS32: lui {{.*}} i16v
299 ; MIPS32: addiu {{.*}} i16v
300 ; MIPS32: sh
301 ; MIPS32: move
302 ; MIPS32: andi {{.*}},0xff
303 ; MIPS32: lui {{.*}} i32v
304 ; MIPS32: addiu {{.*}} i32v
305 ; MIPS32: sw
306 ; MIPS32: andi {{.*}},0xff
307 ; MIPS32: li {{.*}},0
308 ; MIPS32: lui {{.*}} i64v
309 ; MIPS32: addiu {{.*}} i64v
310
213 define internal void @from_uint16() { 311 define internal void @from_uint16() {
214 entry: 312 entry:
215 %__0 = bitcast [2 x i8]* @u16v to i16* 313 %__0 = bitcast [2 x i8]* @u16v to i16*
216 %v0 = load i16, i16* %__0, align 1 314 %v0 = load i16, i16* %__0, align 1
217 %v1 = trunc i16 %v0 to i8 315 %v1 = trunc i16 %v0 to i8
218 %__3 = bitcast [1 x i8]* @i8v to i8* 316 %__3 = bitcast [1 x i8]* @i8v to i8*
219 store i8 %v1, i8* %__3, align 1 317 store i8 %v1, i8* %__3, align 1
220 %v2 = zext i16 %v0 to i32 318 %v2 = zext i16 %v0 to i32
221 %__5 = bitcast [4 x i8]* @i32v to i32* 319 %__5 = bitcast [4 x i8]* @i32v to i32*
222 store i32 %v2, i32* %__5, align 1 320 store i32 %v2, i32* %__5, align 1
(...skipping 17 matching lines...) Expand all
240 ; ARM32: movw {{.*}}i8v 338 ; ARM32: movw {{.*}}i8v
241 ; ARM32: strb 339 ; ARM32: strb
242 ; ARM32: uxth 340 ; ARM32: uxth
243 ; ARM32: movw {{.*}}i32v 341 ; ARM32: movw {{.*}}i32v
244 ; ARM32: str r 342 ; ARM32: str r
245 ; ARM32: uxth 343 ; ARM32: uxth
246 ; ARM32: mov {{.*}}, #0 344 ; ARM32: mov {{.*}}, #0
247 ; ARM32: movw {{.*}}i64v 345 ; ARM32: movw {{.*}}i64v
248 ; ARM32: str r 346 ; ARM32: str r
249 347
348 ; MIPS32-LABEL: from_uint16
349 ; MIPS32: lui {{.*}} u16v
350 ; MIPS32: addiu {{.*}} u16v
351 ; MIPS32: lh
352 ; MIPS32: move
353 ; MIPS32: lui {{.*}} i8v
354 ; MIPS32: addiu {{.*}} i8v
355 ; MIPS32: sb
356 ; MIPS32: move
357 ; MIPS32: andi {{.*}},0xffff
358 ; MIPS32: lui {{.*}} i32v
359 ; MIPS32: addiu {{.*}} i32v
360 ; MIPS32: sw
361 ; MIPS32: andi {{.*}},0xffff
362 ; MIPS32: li {{.*}},0
363 ; MIPS32: lui {{.*}} i64v
364 ; MIPS32: addiu {{.*}} i64v
365
250 define internal void @from_uint32() { 366 define internal void @from_uint32() {
251 entry: 367 entry:
252 %__0 = bitcast [4 x i8]* @u32v to i32* 368 %__0 = bitcast [4 x i8]* @u32v to i32*
253 %v0 = load i32, i32* %__0, align 1 369 %v0 = load i32, i32* %__0, align 1
254 %v1 = trunc i32 %v0 to i8 370 %v1 = trunc i32 %v0 to i8
255 %__3 = bitcast [1 x i8]* @i8v to i8* 371 %__3 = bitcast [1 x i8]* @i8v to i8*
256 store i8 %v1, i8* %__3, align 1 372 store i8 %v1, i8* %__3, align 1
257 %v2 = trunc i32 %v0 to i16 373 %v2 = trunc i32 %v0 to i16
258 %__5 = bitcast [2 x i8]* @i16v to i16* 374 %__5 = bitcast [2 x i8]* @i16v to i16*
259 store i16 %v2, i16* %__5, align 1 375 store i16 %v2, i16* %__5, align 1
(...skipping 13 matching lines...) Expand all
273 ; ARM32: movw {{.*}}u32v 389 ; ARM32: movw {{.*}}u32v
274 ; ARM32: ldr r 390 ; ARM32: ldr r
275 ; ARM32: movw {{.*}}i8v 391 ; ARM32: movw {{.*}}i8v
276 ; ARM32: strb 392 ; ARM32: strb
277 ; ARM32: movw {{.*}}i16v 393 ; ARM32: movw {{.*}}i16v
278 ; ARM32: strh 394 ; ARM32: strh
279 ; ARM32: mov {{.*}}, #0 395 ; ARM32: mov {{.*}}, #0
280 ; ARM32: movw {{.*}}i64v 396 ; ARM32: movw {{.*}}i64v
281 ; ARM32: str r 397 ; ARM32: str r
282 398
399 ; MIPS32-LABEL: from_uint32
400 ; MIPS32: lui {{.*}} u32v
401 ; MIPS32: addiu {{.*}} u32v
402 ; MIPS32: lw
403 ; MIPS32: move
404 ; MIPS32: lui {{.*}} i8v
405 ; MIPS32: addiu {{.*}} i8v
406 ; MIPS32: sb
407 ; MIPS32: move
408 ; MIPS32: lui {{.*}} i16v
409 ; MIPS32: addiu {{.*}} i16v
410 ; MIPS32: sh
411 ; MIPS32: li {{.*}},0
412 ; MIPS32: lui {{.*}} i64v
413 ; MIPS32: addiu {{.*}} i64v
414
283 define internal void @from_uint64() { 415 define internal void @from_uint64() {
284 entry: 416 entry:
285 %__0 = bitcast [8 x i8]* @u64v to i64* 417 %__0 = bitcast [8 x i8]* @u64v to i64*
286 %v0 = load i64, i64* %__0, align 1 418 %v0 = load i64, i64* %__0, align 1
287 %v1 = trunc i64 %v0 to i8 419 %v1 = trunc i64 %v0 to i8
288 %__3 = bitcast [1 x i8]* @i8v to i8* 420 %__3 = bitcast [1 x i8]* @i8v to i8*
289 store i8 %v1, i8* %__3, align 1 421 store i8 %v1, i8* %__3, align 1
290 %v2 = trunc i64 %v0 to i16 422 %v2 = trunc i64 %v0 to i16
291 %__5 = bitcast [2 x i8]* @i16v to i16* 423 %__5 = bitcast [2 x i8]* @i16v to i16*
292 store i16 %v2, i16* %__5, align 1 424 store i16 %v2, i16* %__5, align 1
(...skipping 10 matching lines...) Expand all
303 435
304 ; ARM32-LABEL: from_uint64 436 ; ARM32-LABEL: from_uint64
305 ; ARM32: movw {{.*}}u64v 437 ; ARM32: movw {{.*}}u64v
306 ; ARM32: ldr r 438 ; ARM32: ldr r
307 ; ARM32: movw {{.*}}i8v 439 ; ARM32: movw {{.*}}i8v
308 ; ARM32: strb 440 ; ARM32: strb
309 ; ARM32: movw {{.*}}i16v 441 ; ARM32: movw {{.*}}i16v
310 ; ARM32: strh 442 ; ARM32: strh
311 ; ARM32: movw {{.*}}i32v 443 ; ARM32: movw {{.*}}i32v
312 ; ARM32: str r 444 ; ARM32: str r
445
446 ; MIPS32-LABEL: from_uint64
447 ; MIPS32: lui {{.*}} u64v
448 ; MIPS32: addiu {{.*}} u64v
449 ; MIPS32: lw
450 ; MIPS32: move
451 ; MIPS32: lui {{.*}} i8v
452 ; MIPS32: addiu {{.*}} i8v
453 ; MIPS32: sb
454 ; MIPS32: move
455 ; MIPS32: lui {{.*}} i16v
456 ; MIPS32: addiu {{.*}} i16v
457 ; MIPS32: sh
458 ; MIPS32: lui {{.*}} i32v
459 ; MIPS32: addiu {{.*}} i32v
460
Jim Stichnoth 2016/10/28 17:42:07 Remove trailing "whitespace" (last blank line) to
Stefan Maksimovic 2016/10/31 10:33:08 Done.
OLDNEW
« tests_lit/llvm2ice_tests/64bit.pnacl.ll ('K') | « tests_lit/llvm2ice_tests/commutativity.ll ('k') | tests_lit/llvm2ice_tests/fp.call_ret.ll » ('j') | tests_lit/llvm2ice_tests/fp.call_ret.ll » ('J')

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