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Side by Side Diff: tests_lit/llvm2ice_tests/commutativity.ll

Issue 2448193008: Subzero, MIPS32: Enable MIPS support in lit tests (Closed)
Patch Set: Created 4 years, 1 month ago
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1 ; Test the lowering sequence for commutative operations. If there is a source 1 ; Test the lowering sequence for commutative operations. If there is a source
2 ; operand whose lifetime ends in an operation, it should be the first operand, 2 ; operand whose lifetime ends in an operation, it should be the first operand,
3 ; eliminating the need for a move to start the new lifetime. 3 ; eliminating the need for a move to start the new lifetime.
4 4
5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
6 ; RUN: --target x8632 -i %s --args -O2 \ 6 ; RUN: --target x8632 -i %s --args -O2 \
7 ; RUN: | %if --need=target_X8632 --command FileCheck %s 7 ; RUN: | %if --need=target_X8632 --command FileCheck %s
8 8
9 ; RUN: %if --need=target_MIPS32 --need=allow_dump \
10 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \
11 ; RUN: mips32 -i %s --args -O2 -allow-externally-defined-symbols \
12 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \
13 ; RUN: --command FileCheck --check-prefix MIPS32 %s
14
9 define internal i32 @integerAddLeft(i32 %a, i32 %b) { 15 define internal i32 @integerAddLeft(i32 %a, i32 %b) {
10 entry: 16 entry:
11 %tmp = add i32 %a, %b 17 %tmp = add i32 %a, %b
12 %result = add i32 %a, %tmp 18 %result = add i32 %a, %tmp
13 ret i32 %result 19 ret i32 %result
14 } 20 }
15 ; CHECK-LABEL: integerAddLeft 21 ; CHECK-LABEL: integerAddLeft
16 ; CHECK-NEXT: mov {{e..}},DWORD PTR 22 ; CHECK-NEXT: mov {{e..}},DWORD PTR
17 ; CHECK-NEXT: mov {{e..}},DWORD PTR 23 ; CHECK-NEXT: mov {{e..}},DWORD PTR
18 ; CHECK-NEXT: add {{e..}},{{e..}} 24 ; CHECK-NEXT: add {{e..}},{{e..}}
19 ; CHECK-NEXT: add {{e..}},{{e..}} 25 ; CHECK-NEXT: add {{e..}},{{e..}}
26 ; MIPS32-LABEL: integerAddLeft
27 ; MIPS32: move v0,a0
28 ; MIPS32: addu v0,v0,a1
29 ; MIPS32: addu a0,a0,v0
20 30
21 define internal i32 @integerAddRight(i32 %a, i32 %b) { 31 define internal i32 @integerAddRight(i32 %a, i32 %b) {
22 entry: 32 entry:
23 %tmp = add i32 %a, %b 33 %tmp = add i32 %a, %b
24 %result = add i32 %b, %tmp 34 %result = add i32 %b, %tmp
25 ret i32 %result 35 ret i32 %result
26 } 36 }
27 ; CHECK-LABEL: integerAddRight 37 ; CHECK-LABEL: integerAddRight
28 ; CHECK-NEXT: mov {{e..}},DWORD PTR 38 ; CHECK-NEXT: mov {{e..}},DWORD PTR
29 ; CHECK-NEXT: mov {{e..}},DWORD PTR 39 ; CHECK-NEXT: mov {{e..}},DWORD PTR
30 ; CHECK-NEXT: add {{e..}},{{e..}} 40 ; CHECK-NEXT: add {{e..}},{{e..}}
31 ; CHECK-NEXT: add {{e..}},{{e..}} 41 ; CHECK-NEXT: add {{e..}},{{e..}}
42 ; MIPS32-LABEL: integerAddRight
43 ; MIPS32: move v0,a1
44 ; MIPS32: addu a0,a0,v0
45 ; MIPS32: addu a1,a1,a0
32 46
33 define internal i32 @integerMultiplyLeft(i32 %a, i32 %b) { 47 define internal i32 @integerMultiplyLeft(i32 %a, i32 %b) {
34 entry: 48 entry:
35 %tmp = mul i32 %a, %b 49 %tmp = mul i32 %a, %b
36 %result = mul i32 %a, %tmp 50 %result = mul i32 %a, %tmp
37 ret i32 %result 51 ret i32 %result
38 } 52 }
39 ; CHECK-LABEL: integerMultiplyLeft 53 ; CHECK-LABEL: integerMultiplyLeft
40 ; CHECK-NEXT: mov {{e..}},DWORD PTR 54 ; CHECK-NEXT: mov {{e..}},DWORD PTR
41 ; CHECK-NEXT: mov {{e..}},DWORD PTR 55 ; CHECK-NEXT: mov {{e..}},DWORD PTR
42 ; CHECK-NEXT: imul {{e..}},{{e..}} 56 ; CHECK-NEXT: imul {{e..}},{{e..}}
43 ; CHECK-NEXT: imul {{e..}},{{e..}} 57 ; CHECK-NEXT: imul {{e..}},{{e..}}
58 ; MIPS32-LABEL: integerMultiplyLeft
59 ; MIPS32: move v0,a0
60 ; MIPS32: mul v0,v0,a1
61 ; MIPS32: mul a0,a0,v0
44 62
45 define internal i32 @integerMultiplyRight(i32 %a, i32 %b) { 63 define internal i32 @integerMultiplyRight(i32 %a, i32 %b) {
46 entry: 64 entry:
47 %tmp = mul i32 %a, %b 65 %tmp = mul i32 %a, %b
48 %result = mul i32 %b, %tmp 66 %result = mul i32 %b, %tmp
49 ret i32 %result 67 ret i32 %result
50 } 68 }
51 ; CHECK-LABEL: integerMultiplyRight 69 ; CHECK-LABEL: integerMultiplyRight
52 ; CHECK-NEXT: mov {{e..}},DWORD PTR 70 ; CHECK-NEXT: mov {{e..}},DWORD PTR
53 ; CHECK-NEXT: mov {{e..}},DWORD PTR 71 ; CHECK-NEXT: mov {{e..}},DWORD PTR
54 ; CHECK-NEXT: imul {{e..}},{{e..}} 72 ; CHECK-NEXT: imul {{e..}},{{e..}}
55 ; CHECK-NEXT: imul {{e..}},{{e..}} 73 ; CHECK-NEXT: imul {{e..}},{{e..}}
74 ; MIPS32-LABEL: integerMultiplyRight
75 ; MIPS32: move v0,a1
76 ; MIPS32: mul a0,a0,v0
77 ; MIPS32: mul a1,a1,a0
56 78
57 define internal float @floatAddLeft(float %a, float %b) { 79 define internal float @floatAddLeft(float %a, float %b) {
58 entry: 80 entry:
59 %tmp = fadd float %a, %b 81 %tmp = fadd float %a, %b
60 %result = fadd float %a, %tmp 82 %result = fadd float %a, %tmp
61 ret float %result 83 ret float %result
62 } 84 }
63 ; CHECK-LABEL: floatAddLeft 85 ; CHECK-LABEL: floatAddLeft
64 ; CHECK-NEXT: sub esp,0x1c 86 ; CHECK-NEXT: sub esp,0x1c
65 ; CHECK-NEXT: movss xmm0,DWORD PTR 87 ; CHECK-NEXT: movss xmm0,DWORD PTR
66 ; CHECK-NEXT: movss xmm1,DWORD PTR 88 ; CHECK-NEXT: movss xmm1,DWORD PTR
67 ; CHECK-NEXT: addss xmm1,xmm0 89 ; CHECK-NEXT: addss xmm1,xmm0
68 ; CHECK-NEXT: addss xmm0,xmm1 90 ; CHECK-NEXT: addss xmm0,xmm1
91 ; MIPS32-LABEL: floatAddLeft
92 ; MIPS32: mov.s $f0,$f12
93 ; MIPS32: add.s $f0,$f0,$f14
94 ; MIPS32: add.s $f12,$f12,$f0
69 95
70 define internal float @floatAddRight(float %a, float %b) { 96 define internal float @floatAddRight(float %a, float %b) {
71 entry: 97 entry:
72 %tmp = fadd float %a, %b 98 %tmp = fadd float %a, %b
73 %result = fadd float %b, %tmp 99 %result = fadd float %b, %tmp
74 ret float %result 100 ret float %result
75 } 101 }
76 ; CHECK-LABEL: floatAddRight 102 ; CHECK-LABEL: floatAddRight
77 ; CHECK-NEXT: sub esp,0x1c 103 ; CHECK-NEXT: sub esp,0x1c
78 ; CHECK-NEXT: movss xmm0,DWORD PTR 104 ; CHECK-NEXT: movss xmm0,DWORD PTR
79 ; CHECK-NEXT: movss xmm1,DWORD PTR 105 ; CHECK-NEXT: movss xmm1,DWORD PTR
80 ; CHECK-NEXT: addss xmm0,xmm1 106 ; CHECK-NEXT: addss xmm0,xmm1
81 ; CHECK-NEXT: addss xmm1,xmm0 107 ; CHECK-NEXT: addss xmm1,xmm0
108 ; MIPS32-LABEL: floatAddRight
109 ; MIPS32: mov.s $f0,$f14
110 ; MIPS32: add.s $f12,$f12,$f0
111 ; MIPS32: add.s $f14,$f14,$f12
82 112
83 define internal float @floatMultiplyLeft(float %a, float %b) { 113 define internal float @floatMultiplyLeft(float %a, float %b) {
84 entry: 114 entry:
85 %tmp = fmul float %a, %b 115 %tmp = fmul float %a, %b
86 %result = fmul float %a, %tmp 116 %result = fmul float %a, %tmp
87 ret float %result 117 ret float %result
88 } 118 }
89 ; CHECK-LABEL: floatMultiplyLeft 119 ; CHECK-LABEL: floatMultiplyLeft
90 ; CHECK-NEXT: sub esp,0x1c 120 ; CHECK-NEXT: sub esp,0x1c
91 ; CHECK-NEXT: movss xmm0,DWORD PTR 121 ; CHECK-NEXT: movss xmm0,DWORD PTR
92 ; CHECK-NEXT: movss xmm1,DWORD PTR 122 ; CHECK-NEXT: movss xmm1,DWORD PTR
93 ; CHECK-NEXT: mulss xmm1,xmm0 123 ; CHECK-NEXT: mulss xmm1,xmm0
94 ; CHECK-NEXT: mulss xmm0,xmm1 124 ; CHECK-NEXT: mulss xmm0,xmm1
125 ; MIPS32-LABEL: floatMultiplyLeft
126 ; MIPS32: mov.s $f0,$f12
127 ; MIPS32: mul.s $f0,$f0,$f14
128 ; MIPS32: mul.s $f12,$f12,$f0
95 129
96 define internal float @floatMultiplyRight(float %a, float %b) { 130 define internal float @floatMultiplyRight(float %a, float %b) {
97 entry: 131 entry:
98 %tmp = fmul float %a, %b 132 %tmp = fmul float %a, %b
99 %result = fmul float %b, %tmp 133 %result = fmul float %b, %tmp
100 ret float %result 134 ret float %result
101 } 135 }
102 ; CHECK-LABEL: floatMultiplyRight 136 ; CHECK-LABEL: floatMultiplyRight
103 ; CHECK-NEXT: sub esp,0x1c 137 ; CHECK-NEXT: sub esp,0x1c
104 ; CHECK-NEXT: movss xmm0,DWORD PTR 138 ; CHECK-NEXT: movss xmm0,DWORD PTR
105 ; CHECK-NEXT: movss xmm1,DWORD PTR 139 ; CHECK-NEXT: movss xmm1,DWORD PTR
106 ; CHECK-NEXT: mulss xmm0,xmm1 140 ; CHECK-NEXT: mulss xmm0,xmm1
107 ; CHECK-NEXT: mulss xmm1,xmm0 141 ; CHECK-NEXT: mulss xmm1,xmm0
142 ; MIPS32-LABEL: floatMultiplyRight
143 ; MIPS32: mov.s $f0,$f14
144 ; MIPS32: mul.s $f12,$f12,$f0
145 ; MIPS32: mul.s $f14,$f14,$f12
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