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Issue 2446273003: [SubZero] Generate relocations for MIPS (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 1 month ago
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1 //===- subzero/src/IceTypes.def - X-macros for ICE types --------*- C++ -*-===// 1 //===- subzero/src/IceTypes.def - X-macros for ICE types --------*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file defines properties of ICE primitive types in the form of x-macros. 10 // This file defines properties of ICE primitive types in the form of x-macros.
(...skipping 11 matching lines...) Expand all
22 // 22 //
23 // 2- native code is always emitted as ELF32. 23 // 2- native code is always emitted as ELF32.
24 // 24 //
25 // TODO(jpp): set ABI e_flags for AArch64. 25 // TODO(jpp): set ABI e_flags for AArch64.
26 #define TARGETARCH_TABLE \ 26 #define TARGETARCH_TABLE \
27 /* enum value, printable string, is_elf64, e_machine, e_flags */ \ 27 /* enum value, printable string, is_elf64, e_machine, e_flags */ \
28 X(Target_X8632, "x86-32", false, EM_386, 0) \ 28 X(Target_X8632, "x86-32", false, EM_386, 0) \
29 X(Target_X8664, "x86-64", true, EM_X86_64, 0) \ 29 X(Target_X8664, "x86-64", true, EM_X86_64, 0) \
30 X(Target_ARM32, "arm32", false, EM_ARM, EF_ARM_EABI_VER5) \ 30 X(Target_ARM32, "arm32", false, EM_ARM, EF_ARM_EABI_VER5) \
31 X(Target_ARM64, "arm64", true, EM_AARCH64, 0) \ 31 X(Target_ARM64, "arm64", true, EM_AARCH64, 0) \
32 X(Target_MIPS32,"mips32", false, EM_MIPS, 0) \ 32 X(Target_MIPS32,"mips32", false, EM_MIPS, EF_MIPS_ABI_O32|EF_MIPS_ARCH_32)\
33 //#define X(tag, str, is_elf64, e_machine, e_flags) 33 //#define X(tag, str, is_elf64, e_machine, e_flags)
34 34
35 #define ICETYPE_TABLE \ 35 #define ICETYPE_TABLE \
36 /* enum value, log_2(size), align, # elts, element type, */ \ 36 /* enum value, log_2(size), align, # elts, element type, */ \
37 /* printable string (size and alignment in bytes), */ \ 37 /* printable string (size and alignment in bytes), */ \
38 /* register class string */ \ 38 /* register class string */ \
39 X(void, -1, 0, 1, void, "void", "void") \ 39 X(void, -1, 0, 1, void, "void", "void") \
40 X(i1, 0, 1, 1, i1, "i1", "i1") \ 40 X(i1, 0, 1, 1, i1, "i1", "i1") \
41 X(i8, 0, 1, 1, i8, "i8", "i8") \ 41 X(i8, 0, 1, 1, i8, "i8", "i8") \
42 X(i16, 1, 1, 1, i16, "i16", "i16") \ 42 X(i16, 1, 1, 1, i16, "i16", "i16") \
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after
76 X(v8i1, 1, 1, 0, 0, 0, 1, v8i1) \ 76 X(v8i1, 1, 1, 0, 0, 0, 1, v8i1) \
77 X(v16i1, 1, 1, 0, 0, 0, 1, v16i1) \ 77 X(v16i1, 1, 1, 0, 0, 0, 1, v16i1) \
78 X(v16i8, 1, 1, 0, 1, 1, 1, v16i1) \ 78 X(v16i8, 1, 1, 0, 1, 1, 1, v16i1) \
79 X(v8i16, 1, 1, 0, 1, 1, 1, v8i1) \ 79 X(v8i16, 1, 1, 0, 1, 1, 1, v8i1) \
80 X(v4i32, 1, 1, 0, 1, 1, 1, v4i1) \ 80 X(v4i32, 1, 1, 0, 1, 1, 1, v4i1) \
81 X(v4f32, 1, 0, 1, 0, 1, 1, v4i1) \ 81 X(v4f32, 1, 0, 1, 0, 1, 1, v4i1) \
82 //#define X(tag, IsVec, IsInt, IsFloat, IsIntArith, IsLoadStore, IsParam, \ 82 //#define X(tag, IsVec, IsInt, IsFloat, IsIntArith, IsLoadStore, IsParam, \
83 // CompareResult) 83 // CompareResult)
84 84
85 #endif // SUBZERO_SRC_ICETYPES_DEF 85 #endif // SUBZERO_SRC_ICETYPES_DEF
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