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Side by Side Diff: src/IceTargetLoweringMIPS32.cpp

Issue 2446273003: [SubZero] Generate relocations for MIPS (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 1 month ago
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1 // 1 //
2 // The Subzero Code Generator 2 // The Subzero Code Generator
3 // 3 //
4 // This file is distributed under the University of Illinois Open Source 4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details. 5 // License. See LICENSE.TXT for details.
6 // 6 //
7 //===----------------------------------------------------------------------===// 7 //===----------------------------------------------------------------------===//
8 /// 8 ///
9 /// \file 9 /// \file
10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
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1647 return; 1647 return;
1648 } 1648 }
1649 1649
1650 Variable *TargetMIPS32::PostLoweringLegalizer::newBaseRegister( 1650 Variable *TargetMIPS32::PostLoweringLegalizer::newBaseRegister(
1651 Variable *Base, int32_t Offset, RegNumT ScratchRegNum) { 1651 Variable *Base, int32_t Offset, RegNumT ScratchRegNum) {
1652 // Legalize will likely need a lui/ori combination, but if the top bits are 1652 // Legalize will likely need a lui/ori combination, but if the top bits are
1653 // all 0 from negating the offset and subtracting, we could use that instead. 1653 // all 0 from negating the offset and subtracting, we could use that instead.
1654 const bool ShouldSub = Offset != 0 && (-Offset & 0xFFFF0000) == 0; 1654 const bool ShouldSub = Offset != 0 && (-Offset & 0xFFFF0000) == 0;
1655 Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum); 1655 Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum);
1656 if (ShouldSub) { 1656 if (ShouldSub) {
1657 Variable *OffsetVal = Target->legalizeToReg( 1657 Target->_addi(ScratchReg, Base, -Offset);
1658 Target->Ctx->getConstantInt32(-Offset), ScratchRegNum);
1659 Target->_sub(ScratchReg, Base, OffsetVal);
1660 } else { 1658 } else {
1661 constexpr bool SignExt = true; 1659 constexpr bool SignExt = true;
1662 if (!OperandMIPS32Mem::canHoldOffset(Base->getType(), SignExt, Offset)) { 1660 if (!OperandMIPS32Mem::canHoldOffset(Base->getType(), SignExt, Offset)) {
1663 const uint32_t UpperBits = (Offset >> 16) & 0xFFFF; 1661 const uint32_t UpperBits = (Offset >> 16) & 0xFFFF;
1664 const uint32_t LowerBits = Offset & 0xFFFF; 1662 const uint32_t LowerBits = Offset & 0xFFFF;
1665 Target->_lui(ScratchReg, Target->Ctx->getConstantInt32(UpperBits)); 1663 Target->_lui(ScratchReg, Target->Ctx->getConstantInt32(UpperBits));
1666 if (LowerBits) 1664 if (LowerBits)
1667 Target->_ori(ScratchReg, ScratchReg, LowerBits); 1665 Target->_ori(ScratchReg, ScratchReg, LowerBits);
1668 Target->_addu(ScratchReg, ScratchReg, Base); 1666 Target->_addu(ScratchReg, ScratchReg, Base);
1669 } else { 1667 } else {
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4966 4964
4967 TargetDataMIPS32::TargetDataMIPS32(GlobalContext *Ctx) 4965 TargetDataMIPS32::TargetDataMIPS32(GlobalContext *Ctx)
4968 : TargetDataLowering(Ctx) {} 4966 : TargetDataLowering(Ctx) {}
4969 4967
4970 void TargetDataMIPS32::lowerGlobals(const VariableDeclarationList &Vars, 4968 void TargetDataMIPS32::lowerGlobals(const VariableDeclarationList &Vars,
4971 const std::string &SectionSuffix) { 4969 const std::string &SectionSuffix) {
4972 const bool IsPIC = getFlags().getUseNonsfi(); 4970 const bool IsPIC = getFlags().getUseNonsfi();
4973 switch (getFlags().getOutFileType()) { 4971 switch (getFlags().getOutFileType()) {
4974 case FT_Elf: { 4972 case FT_Elf: {
4975 ELFObjectWriter *Writer = Ctx->getObjectWriter(); 4973 ELFObjectWriter *Writer = Ctx->getObjectWriter();
4976 Writer->writeDataSection(Vars, llvm::ELF::R_MIPS_GLOB_DAT, SectionSuffix, 4974 Writer->writeDataSection(Vars, llvm::ELF::R_MIPS_32, SectionSuffix, IsPIC);
4977 IsPIC);
4978 } break; 4975 } break;
4979 case FT_Asm: 4976 case FT_Asm:
4980 case FT_Iasm: { 4977 case FT_Iasm: {
4981 OstreamLocker L(Ctx); 4978 OstreamLocker L(Ctx);
4982 for (const VariableDeclaration *Var : Vars) { 4979 for (const VariableDeclaration *Var : Vars) {
4983 if (getFlags().matchTranslateOnly(Var->getName(), 0)) { 4980 if (getFlags().matchTranslateOnly(Var->getName(), 0)) {
4984 emitGlobal(*Var, SectionSuffix); 4981 emitGlobal(*Var, SectionSuffix);
4985 } 4982 }
4986 } 4983 }
4987 } break; 4984 } break;
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5332 Str << "\t.set\t" 5329 Str << "\t.set\t"
5333 << "noat\n"; 5330 << "noat\n";
5334 } 5331 }
5335 5332
5336 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; 5333 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
5337 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; 5334 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
5338 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; 5335 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
5339 5336
5340 } // end of namespace MIPS32 5337 } // end of namespace MIPS32
5341 } // end of namespace Ice 5338 } // end of namespace Ice
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