Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(39)

Side by Side Diff: runtime/vm/constants_arm64.h

Issue 243773002: Adds Runtime call stub and Dart entry stub to ARM64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « runtime/vm/assembler_x64.h ('k') | runtime/vm/disassembler_arm64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_CONSTANTS_ARM64_H_ 5 #ifndef VM_CONSTANTS_ARM64_H_
6 #define VM_CONSTANTS_ARM64_H_ 6 #define VM_CONSTANTS_ARM64_H_
7 7
8 #include "platform/assert.h" 8 #include "platform/assert.h"
9 9
10 namespace dart { 10 namespace dart {
(...skipping 93 matching lines...) Expand 10 before | Expand all | Expand 10 after
104 typedef VRegister FpuRegister; 104 typedef VRegister FpuRegister;
105 const FpuRegister FpuTMP = VTMP0; 105 const FpuRegister FpuTMP = VTMP0;
106 const int kNumberOfFpuRegisters = kNumberOfVRegisters; 106 const int kNumberOfFpuRegisters = kNumberOfVRegisters;
107 const FpuRegister kNoFpuRegister = kNoVRegister; 107 const FpuRegister kNoFpuRegister = kNoVRegister;
108 108
109 // Register aliases. 109 // Register aliases.
110 const Register TMP = R16; // Used as scratch register by assembler. 110 const Register TMP = R16; // Used as scratch register by assembler.
111 const Register TMP2 = R17; 111 const Register TMP2 = R17;
112 const Register CTX = R28; // Caches current context in generated code. 112 const Register CTX = R28; // Caches current context in generated code.
113 const Register PP = R27; // Caches object pool pointer in generated code. 113 const Register PP = R27; // Caches object pool pointer in generated code.
114 const Register FPREG = FP; // Frame pointer register.
114 const Register SPREG = R31; // Stack pointer register. 115 const Register SPREG = R31; // Stack pointer register.
115 const Register FPREG = FP; // Frame pointer register.
116 const Register ICREG = R5; // IC data register. 116 const Register ICREG = R5; // IC data register.
117 117
118 // Exception object is passed in this register to the catch handlers when an 118 // Exception object is passed in this register to the catch handlers when an
119 // exception is thrown. 119 // exception is thrown.
120 const Register kExceptionObjectReg = R0; 120 const Register kExceptionObjectReg = R0;
121 121
122 // Stack trace object is passed in this register to the catch handlers when 122 // Stack trace object is passed in this register to the catch handlers when
123 // an exception is thrown. 123 // an exception is thrown.
124 const Register kStackTraceObjectReg = R1; 124 const Register kStackTraceObjectReg = R1;
125 125
126 // Masks, sizes, etc. 126 // Masks, sizes, etc.
127 const int kXRegSizeInBits = 64; 127 const int kXRegSizeInBits = 64;
128 const int kWRegSizeInBits = 32; 128 const int kWRegSizeInBits = 32;
129 const int64_t kXRegMask = 0xffffffffffffffffL; 129 const int64_t kXRegMask = 0xffffffffffffffffL;
130 const int64_t kWRegMask = 0x00000000ffffffffL; 130 const int64_t kWRegMask = 0x00000000ffffffffL;
131 131
132 // List of registers used in load/store multiple. 132 // List of registers used in load/store multiple.
133 typedef uint32_t RegList; 133 typedef uint32_t RegList;
134 const RegList kAllCpuRegistersList = 0xFFFF; 134 const RegList kAllCpuRegistersList = 0xFFFF;
135 135
136 136
137 // C++ ABI call registers. 137 // C++ ABI call registers.
138 const RegList kAbiArgumentCpuRegs = 138 const RegList kAbiArgumentCpuRegs =
139 (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3) | 139 (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3) |
140 (1 << R4) | (1 << R5) | (1 << R6) | (1 << R7); 140 (1 << R4) | (1 << R5) | (1 << R6) | (1 << R7);
141 const RegList kAbiPreservedCpuRegs = 141 const RegList kAbiPreservedCpuRegs =
142 (1 << R19) | (1 << R20) | (1 << R21) | (1 << R22) | 142 (1 << R19) | (1 << R20) | (1 << R21) | (1 << R22) |
143 (1 << R23) | (1 << R24) | (1 << R25) | (1 << R26) | 143 (1 << R23) | (1 << R24) | (1 << R25) | (1 << R26) |
144 (1 << R27) | (1 << R28) | (1 << R29); 144 (1 << R27) | (1 << R28);
145 const int kAbiPreservedCpuRegCount = 11; 145 const int kAbiPreservedCpuRegCount = 10;
146 const VRegister kAbiFirstPreservedFpuReg = V8; 146 const VRegister kAbiFirstPreservedFpuReg = V8;
147 const VRegister kAbiLastPreservedFpuReg = V15; 147 const VRegister kAbiLastPreservedFpuReg = V15;
148 const int kAbiPreservedFpuRegCount = 8; 148 const int kAbiPreservedFpuRegCount = 8;
149 149
150 // CPU registers available to Dart allocator. 150 // CPU registers available to Dart allocator.
151 const RegList kDartAvailableCpuRegs = 151 const RegList kDartAvailableCpuRegs =
152 (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3) | 152 (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3) |
153 (1 << R4) | (1 << R5) | (1 << R6) | (1 << R7) | 153 (1 << R4) | (1 << R5) | (1 << R6) | (1 << R7) |
154 (1 << R8) | (1 << R9) | (1 << R10) | (1 << R11) | 154 (1 << R8) | (1 << R9) | (1 << R10) | (1 << R11) |
155 (1 << R12) | (1 << R13) | (1 << R14) | (1 << R15) | 155 (1 << R12) | (1 << R13) | (1 << R14) | (1 << R15) |
(...skipping 291 matching lines...) Expand 10 before | Expand all | Expand 10 after
447 SXTB = 4, 447 SXTB = 4,
448 SXTH = 5, 448 SXTH = 5,
449 SXTW = 6, 449 SXTW = 6,
450 SXTX = 7, 450 SXTX = 7,
451 kMaxExtend = 8, 451 kMaxExtend = 8,
452 }; 452 };
453 453
454 enum R31Type { 454 enum R31Type {
455 R31IsSP, 455 R31IsSP,
456 R31IsZR, 456 R31IsZR,
457 R31IsUndef,
458 }; 457 };
459 458
460 // Constants used for the decoding or encoding of the individual fields of 459 // Constants used for the decoding or encoding of the individual fields of
461 // instructions. Based on the "Figure 3-1 ARM instruction set summary". 460 // instructions. Based on the "Figure 3-1 ARM instruction set summary".
462 enum InstructionFields { 461 enum InstructionFields {
463 // S-bit (modify condition register) 462 // S-bit (modify condition register)
464 kSShift = 29, 463 kSShift = 29,
465 kSBits = 1, 464 kSBits = 1,
466 465
467 // sf field. 466 // sf field.
(...skipping 110 matching lines...) Expand 10 before | Expand all | Expand 10 after
578 enum { 577 enum {
579 kInstrSize = 4, 578 kInstrSize = 4,
580 kInstrSizeLog2 = 2, 579 kInstrSizeLog2 = 2,
581 kPCReadOffset = 8 580 kPCReadOffset = 8
582 }; 581 };
583 582
584 static const int32_t kNopInstruction = HINT; // hint #0 === nop. 583 static const int32_t kNopInstruction = HINT; // hint #0 === nop.
585 static const int32_t kBreakPointInstruction = // hlt #kImmExceptionIsDebug. 584 static const int32_t kBreakPointInstruction = // hlt #kImmExceptionIsDebug.
586 HLT | (kImmExceptionIsDebug << kImm16Shift); 585 HLT | (kImmExceptionIsDebug << kImm16Shift);
587 static const int kBreakPointInstructionSize = kInstrSize; 586 static const int kBreakPointInstructionSize = kInstrSize;
587 static const int32_t kRedirectInstruction =
588 HLT | (kImmExceptionIsRedirectedCall << kImm16Shift);
588 589
589 // Read one particular bit out of the instruction bits. 590 // Read one particular bit out of the instruction bits.
590 inline int Bit(int nr) const { 591 inline int Bit(int nr) const {
591 return (InstructionBits() >> nr) & 1; 592 return (InstructionBits() >> nr) & 1;
592 } 593 }
593 594
594 // Read a bit field out of the instruction bits. 595 // Read a bit field out of the instruction bits.
595 inline int Bits(int shift, int count) const { 596 inline int Bits(int shift, int count) const {
596 return (InstructionBits() >> shift) & ((1 << count) - 1); 597 return (InstructionBits() >> shift) & ((1 << count) - 1);
597 } 598 }
(...skipping 193 matching lines...) Expand 10 before | Expand all | Expand 10 after
791 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } 792 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); }
792 793
793 private: 794 private:
794 DISALLOW_ALLOCATION(); 795 DISALLOW_ALLOCATION();
795 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); 796 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
796 }; 797 };
797 798
798 } // namespace dart 799 } // namespace dart
799 800
800 #endif // VM_CONSTANTS_ARM64_H_ 801 #endif // VM_CONSTANTS_ARM64_H_
OLDNEW
« no previous file with comments | « runtime/vm/assembler_x64.h ('k') | runtime/vm/disassembler_arm64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698