Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(177)

Side by Side Diff: test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc

Issue 2437593006: MIPS64: Port '[ARM64] Optimize load followed by shift.' (Closed)
Patch Set: Add big endian support to tests Created 4 years, 2 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/compiler/mips64/instruction-selector-mips64.cc ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file 3 // found in the LICENSE file
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 1777 matching lines...) Expand 10 before | Expand all | Expand 10 after
1788 Node* const n = m.Float64Min(p0, p1); 1788 Node* const n = m.Float64Min(p0, p1);
1789 m.Return(n); 1789 m.Return(n);
1790 Stream s = m.Build(); 1790 Stream s = m.Build();
1791 ASSERT_EQ(1U, s.size()); 1791 ASSERT_EQ(1U, s.size());
1792 EXPECT_EQ(kMips64Float64Min, s[0]->arch_opcode()); 1792 EXPECT_EQ(kMips64Float64Min, s[0]->arch_opcode());
1793 ASSERT_EQ(2U, s[0]->InputCount()); 1793 ASSERT_EQ(2U, s[0]->InputCount());
1794 ASSERT_EQ(1U, s[0]->OutputCount()); 1794 ASSERT_EQ(1U, s[0]->OutputCount());
1795 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 1795 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
1796 } 1796 }
1797 1797
1798 TEST_F(InstructionSelectorTest, LoadAndShiftRight) {
1799 {
1800 int32_t immediates[] = {-256, -255, -3, -2, -1, 0, 1,
1801 2, 3, 255, 256, 260, 4096, 4100,
1802 8192, 8196, 3276, 3280, 16376, 16380};
1803 TRACED_FOREACH(int32_t, index, immediates) {
1804 StreamBuilder m(this, MachineType::Uint64(), MachineType::Pointer());
1805 Node* const load =
1806 m.Load(MachineType::Uint64(), m.Parameter(0), m.Int32Constant(index));
1807 Node* const sar = m.Word64Sar(load, m.Int32Constant(32));
1808 // Make sure we don't fold the shift into the following add:
1809 m.Return(m.Int64Add(sar, m.Parameter(0)));
1810 Stream s = m.Build();
1811 ASSERT_EQ(2U, s.size());
1812 EXPECT_EQ(kMips64Lw, s[0]->arch_opcode());
1813 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
1814 EXPECT_EQ(2U, s[0]->InputCount());
1815 EXPECT_EQ(s.ToVreg(m.Parameter(0)), s.ToVreg(s[0]->InputAt(0)));
1816 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
1817 #if defined(V8_TARGET_LITTLE_ENDIAN)
1818 EXPECT_EQ(index + 4, s.ToInt32(s[0]->InputAt(1)));
1819 #elif defined(V8_TARGET_BIG_ENDIAN)
1820 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
1821 #endif
1822
1823 ASSERT_EQ(1U, s[0]->OutputCount());
1824 }
1825 }
1826 }
1827
1798 } // namespace compiler 1828 } // namespace compiler
1799 } // namespace internal 1829 } // namespace internal
1800 } // namespace v8 1830 } // namespace v8
OLDNEW
« no previous file with comments | « src/compiler/mips64/instruction-selector-mips64.cc ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698