| Index: src/IceTargetLoweringX86BaseImpl.h
|
| diff --git a/src/IceTargetLoweringX86BaseImpl.h b/src/IceTargetLoweringX86BaseImpl.h
|
| index 87bbfde8bb55a3f93996abb00fa210df187cf707..52a5d07cb8a4221f1eb752b6898b510e80cae7d8 100644
|
| --- a/src/IceTargetLoweringX86BaseImpl.h
|
| +++ b/src/IceTargetLoweringX86BaseImpl.h
|
| @@ -4004,9 +4004,6 @@ template <typename TraitsType>
|
| void TargetX86Base<TraitsType>::lowerIntrinsicCall(
|
| const InstIntrinsicCall *Instr) {
|
| switch (Intrinsics::IntrinsicID ID = Instr->getIntrinsicInfo().ID) {
|
| - default:
|
| - llvm::report_fatal_error("Unexpected intrinsic");
|
| - return;
|
| case Intrinsics::AtomicCmpxchg: {
|
| if (!Intrinsics::isMemoryOrderValid(
|
| ID, getConstantMemoryOrder(Instr->getArg(3)),
|
| @@ -4417,8 +4414,8 @@ void TargetX86Base<TraitsType>::lowerIntrinsicCall(
|
| }
|
| return;
|
| }
|
| - case Intrinsics::UnknownIntrinsic:
|
| - Func->setError("Should not be lowering UnknownIntrinsic");
|
| + default: // UnknownIntrinsic
|
| + Func->setError("Unexpected intrinsic");
|
| return;
|
| }
|
| return;
|
| @@ -6090,7 +6087,6 @@ void TargetX86Base<TraitsType>::lowerShuffleVector(
|
| if (Instr->indexesAre(0, 8, 1, 9, 2, 10, 3, 11)) {
|
| auto *T = makeReg(DestTy);
|
| auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem);
|
| - auto *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem);
|
| _movp(T, Src0RM);
|
| _punpckl(T, Src0RM);
|
| _movp(Dest, T);
|
|
|