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| 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// | 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 3997 Variable *T = makeReg(Ty); | 3997 Variable *T = makeReg(Ty); |
| 3998 _movp(T, Slot); | 3998 _movp(T, Slot); |
| 3999 _movp(Instr->getDest(), T); | 3999 _movp(Instr->getDest(), T); |
| 4000 } | 4000 } |
| 4001 } | 4001 } |
| 4002 | 4002 |
| 4003 template <typename TraitsType> | 4003 template <typename TraitsType> |
| 4004 void TargetX86Base<TraitsType>::lowerIntrinsicCall( | 4004 void TargetX86Base<TraitsType>::lowerIntrinsicCall( |
| 4005 const InstIntrinsicCall *Instr) { | 4005 const InstIntrinsicCall *Instr) { |
| 4006 switch (Intrinsics::IntrinsicID ID = Instr->getIntrinsicInfo().ID) { | 4006 switch (Intrinsics::IntrinsicID ID = Instr->getIntrinsicInfo().ID) { |
| 4007 default: | |
| 4008 llvm::report_fatal_error("Unexpected intrinsic"); | |
| 4009 return; | |
| 4010 case Intrinsics::AtomicCmpxchg: { | 4007 case Intrinsics::AtomicCmpxchg: { |
| 4011 if (!Intrinsics::isMemoryOrderValid( | 4008 if (!Intrinsics::isMemoryOrderValid( |
| 4012 ID, getConstantMemoryOrder(Instr->getArg(3)), | 4009 ID, getConstantMemoryOrder(Instr->getArg(3)), |
| 4013 getConstantMemoryOrder(Instr->getArg(4)))) { | 4010 getConstantMemoryOrder(Instr->getArg(4)))) { |
| 4014 Func->setError("Unexpected memory ordering for AtomicCmpxchg"); | 4011 Func->setError("Unexpected memory ordering for AtomicCmpxchg"); |
| 4015 return; | 4012 return; |
| 4016 } | 4013 } |
| 4017 Variable *DestPrev = Instr->getDest(); | 4014 Variable *DestPrev = Instr->getDest(); |
| 4018 Operand *PtrToMem = legalize(Instr->getArg(0)); | 4015 Operand *PtrToMem = legalize(Instr->getArg(0)); |
| 4019 Operand *Expected = legalize(Instr->getArg(1)); | 4016 Operand *Expected = legalize(Instr->getArg(1)); |
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| 4410 break; | 4407 break; |
| 4411 case 8: | 4408 case 8: |
| 4412 _storeq(Value, NewAddr); | 4409 _storeq(Value, NewAddr); |
| 4413 break; | 4410 break; |
| 4414 default: | 4411 default: |
| 4415 Func->setError("Unexpected size for StoreSubVector"); | 4412 Func->setError("Unexpected size for StoreSubVector"); |
| 4416 return; | 4413 return; |
| 4417 } | 4414 } |
| 4418 return; | 4415 return; |
| 4419 } | 4416 } |
| 4420 case Intrinsics::UnknownIntrinsic: | 4417 default: // UnknownIntrinsic |
| 4421 Func->setError("Should not be lowering UnknownIntrinsic"); | 4418 Func->setError("Unexpected intrinsic"); |
| 4422 return; | 4419 return; |
| 4423 } | 4420 } |
| 4424 return; | 4421 return; |
| 4425 } | 4422 } |
| 4426 | 4423 |
| 4427 template <typename TraitsType> | 4424 template <typename TraitsType> |
| 4428 void TargetX86Base<TraitsType>::lowerAtomicCmpxchg(Variable *DestPrev, | 4425 void TargetX86Base<TraitsType>::lowerAtomicCmpxchg(Variable *DestPrev, |
| 4429 Operand *Ptr, | 4426 Operand *Ptr, |
| 4430 Operand *Expected, | 4427 Operand *Expected, |
| 4431 Operand *Desired) { | 4428 Operand *Desired) { |
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| 6083 auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); | 6080 auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); |
| 6084 _movp(T, Src0RM); | 6081 _movp(T, Src0RM); |
| 6085 _punpckl(T, Src0RM); | 6082 _punpckl(T, Src0RM); |
| 6086 _movp(Dest, T); | 6083 _movp(Dest, T); |
| 6087 return; | 6084 return; |
| 6088 } | 6085 } |
| 6089 | 6086 |
| 6090 if (Instr->indexesAre(0, 8, 1, 9, 2, 10, 3, 11)) { | 6087 if (Instr->indexesAre(0, 8, 1, 9, 2, 10, 3, 11)) { |
| 6091 auto *T = makeReg(DestTy); | 6088 auto *T = makeReg(DestTy); |
| 6092 auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); | 6089 auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); |
| 6093 auto *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem); | |
| 6094 _movp(T, Src0RM); | 6090 _movp(T, Src0RM); |
| 6095 _punpckl(T, Src0RM); | 6091 _punpckl(T, Src0RM); |
| 6096 _movp(Dest, T); | 6092 _movp(Dest, T); |
| 6097 return; | 6093 return; |
| 6098 } | 6094 } |
| 6099 | 6095 |
| 6100 if (Instr->indexesAre(4, 4, 5, 5, 6, 6, 7, 7)) { | 6096 if (Instr->indexesAre(4, 4, 5, 5, 6, 6, 7, 7)) { |
| 6101 auto *T = makeReg(DestTy); | 6097 auto *T = makeReg(DestTy); |
| 6102 auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); | 6098 auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); |
| 6103 _movp(T, Src0RM); | 6099 _movp(T, Src0RM); |
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| 8251 emitGlobal(*Var, SectionSuffix); | 8247 emitGlobal(*Var, SectionSuffix); |
| 8252 } | 8248 } |
| 8253 } | 8249 } |
| 8254 } break; | 8250 } break; |
| 8255 } | 8251 } |
| 8256 } | 8252 } |
| 8257 } // end of namespace X86NAMESPACE | 8253 } // end of namespace X86NAMESPACE |
| 8258 } // end of namespace Ice | 8254 } // end of namespace Ice |
| 8259 | 8255 |
| 8260 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H | 8256 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H |
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