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1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// | 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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4965 legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex); | 4965 legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex); |
4966 _mov(T, _0); | 4966 _mov(T, _0); |
4967 _mov(DestHi, T); | 4967 _mov(DestHi, T); |
4968 } | 4968 } |
4969 | 4969 |
4970 void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) { | 4970 void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) { |
4971 Variable *Dest = Instr->getDest(); | 4971 Variable *Dest = Instr->getDest(); |
4972 Type DestTy = (Dest != nullptr) ? Dest->getType() : IceType_void; | 4972 Type DestTy = (Dest != nullptr) ? Dest->getType() : IceType_void; |
4973 Intrinsics::IntrinsicID ID = Instr->getIntrinsicInfo().ID; | 4973 Intrinsics::IntrinsicID ID = Instr->getIntrinsicInfo().ID; |
4974 switch (ID) { | 4974 switch (ID) { |
4975 default: | |
4976 llvm::report_fatal_error("Unexpected intrinsic"); | |
4977 return; | |
4978 case Intrinsics::AtomicFence: | 4975 case Intrinsics::AtomicFence: |
4979 case Intrinsics::AtomicFenceAll: | 4976 case Intrinsics::AtomicFenceAll: |
4980 assert(Dest == nullptr); | 4977 assert(Dest == nullptr); |
4981 _dmb(); | 4978 _dmb(); |
4982 return; | 4979 return; |
4983 case Intrinsics::AtomicIsLockFree: { | 4980 case Intrinsics::AtomicIsLockFree: { |
4984 Operand *ByteSize = Instr->getArg(0); | 4981 Operand *ByteSize = Instr->getArg(0); |
4985 auto *CI = llvm::dyn_cast<ConstantInteger32>(ByteSize); | 4982 auto *CI = llvm::dyn_cast<ConstantInteger32>(ByteSize); |
4986 if (CI == nullptr) { | 4983 if (CI == nullptr) { |
4987 // The PNaCl ABI requires the byte size to be a compile-time constant. | 4984 // The PNaCl ABI requires the byte size to be a compile-time constant. |
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5283 _trap(); | 5280 _trap(); |
5284 return; | 5281 return; |
5285 case Intrinsics::LoadSubVector: { | 5282 case Intrinsics::LoadSubVector: { |
5286 UnimplementedLoweringError(this, Instr); | 5283 UnimplementedLoweringError(this, Instr); |
5287 return; | 5284 return; |
5288 } | 5285 } |
5289 case Intrinsics::StoreSubVector: { | 5286 case Intrinsics::StoreSubVector: { |
5290 UnimplementedLoweringError(this, Instr); | 5287 UnimplementedLoweringError(this, Instr); |
5291 return; | 5288 return; |
5292 } | 5289 } |
5293 case Intrinsics::UnknownIntrinsic: | 5290 default: // UnknownIntrinsic |
5294 Func->setError("Should not be lowering UnknownIntrinsic"); | 5291 Func->setError("Unexpected intrinsic"); |
5295 return; | 5292 return; |
5296 } | 5293 } |
5297 return; | 5294 return; |
5298 } | 5295 } |
5299 | 5296 |
5300 void TargetARM32::lowerCLZ(Variable *Dest, Variable *ValLoR, Variable *ValHiR) { | 5297 void TargetARM32::lowerCLZ(Variable *Dest, Variable *ValLoR, Variable *ValHiR) { |
5301 Type Ty = Dest->getType(); | 5298 Type Ty = Dest->getType(); |
5302 assert(Ty == IceType_i32 || Ty == IceType_i64); | 5299 assert(Ty == IceType_i32 || Ty == IceType_i64); |
5303 Variable *T = makeReg(IceType_i32); | 5300 Variable *T = makeReg(IceType_i32); |
5304 _clz(T, ValLoR); | 5301 _clz(T, ValLoR); |
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7158 // However, for compatibility with current NaCl LLVM, don't claim that. | 7155 // However, for compatibility with current NaCl LLVM, don't claim that. |
7159 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; | 7156 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; |
7160 } | 7157 } |
7161 | 7158 |
7162 SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM]; | 7159 SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM]; |
7163 SmallBitVector TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM]; | 7160 SmallBitVector TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM]; |
7164 SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; | 7161 SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; |
7165 | 7162 |
7166 } // end of namespace ARM32 | 7163 } // end of namespace ARM32 |
7167 } // end of namespace Ice | 7164 } // end of namespace Ice |
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