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1 ; Simple test of the store instruction. | 1 ; Simple test of the store instruction. |
2 | 2 |
3 ; REQUIRES: allow_dump | 3 ; REQUIRES: allow_dump |
4 | 4 |
5 ; RUN: %p2i -i %s --args --verbose inst -threads=0 | FileCheck %s | 5 ; RUN: %p2i -i %s --args --verbose inst -threads=0 | FileCheck %s |
6 | 6 |
7 ; RUN: %if --need=target_MIPS32 --need=allow_dump \ | 7 ; RUN: %if --need=target_MIPS32 --need=allow_dump \ |
8 ; RUN: --command %p2i --filetype=asm --assemble \ | 8 ; RUN: --command %p2i --filetype=asm --assemble \ |
9 ; RUN: --disassemble --target mips32 -i %s --args -O2 --skip-unimplemented \ | 9 ; RUN: --disassemble --target mips32 -i %s --args -O2 \ |
10 ; RUN: -allow-externally-defined-symbols \ | 10 ; RUN: -allow-externally-defined-symbols \ |
11 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \ | 11 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \ |
12 ; RUN: --command FileCheck --check-prefix MIPS32 %s | 12 ; RUN: --command FileCheck --check-prefix MIPS32 %s |
13 | 13 |
14 define internal void @store_i64(i32 %addr_arg) { | 14 define internal void @store_i64(i32 %addr_arg) { |
15 entry: | 15 entry: |
16 %__1 = inttoptr i32 %addr_arg to i64* | 16 %__1 = inttoptr i32 %addr_arg to i64* |
17 store i64 1, i64* %__1, align 1 | 17 store i64 1, i64* %__1, align 1 |
18 ret void | 18 ret void |
19 | 19 |
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95 | 95 |
96 ; CHECK: Initial CFG | 96 ; CHECK: Initial CFG |
97 ; CHECK: entry: | 97 ; CHECK: entry: |
98 ; CHECK-NEXT: store double 1.000000e+00, double* %daddr_arg, align 8 | 98 ; CHECK-NEXT: store double 1.000000e+00, double* %daddr_arg, align 8 |
99 ; CHECK-NEXT: ret void | 99 ; CHECK-NEXT: ret void |
100 } | 100 } |
101 ; MIPS32-LABEL: store_f64 | 101 ; MIPS32-LABEL: store_f64 |
102 ; MIPS32: lui | 102 ; MIPS32: lui |
103 ; MIPS32: ldc1 | 103 ; MIPS32: ldc1 |
104 ; MIPS32: sdc1 | 104 ; MIPS32: sdc1 |
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