[SubZero] Fix f64 to/from i64 moves

tests_lit/llvm2ice_tests/fp.load_store.ll

 ; This tries to be a comprehensive test of f32 and f64 compare operations.
 ; The CHECK lines are only checking for basic instruction patterns
 ; that should be present regardless of the optimization level, so
 ; there are no special OPTM1 match lines.
 
 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
 
 ; RUN: %if --need=target_MIPS32 --need=allow_dump \
 ; RUN:   --command %p2i --filetype=asm --assemble \
@@ skipping 59 matching lines @@
 entry:
   %__2 = inttoptr i32 %a to double*
   store double %value, double* %__2, align 8
   ret void
 }
 ; CHECK-LABEL: storeDouble
 ; CHECK: movsd
 ; CHECK: movsd
 
 ; MIPS32-LABEL: storeDouble
-; MIPS32: ldc1 $f{{.*}},4{{.*}}
 ; MIPS32: sdc1 $f{{.*}},0{{.*}}
 ; MIPS32O2-LABEL: storeDouble
+; MIPS32O2: mtc1 a2,$f{{.*}}
 ; MIPS32O2: mtc1 a3,$f{{.*}}
-; MIPS32O2: mtc1 a2,$f{{.*}}
 ; MIPS32O2: sdc1 $f{{.*}},0(a0)
 
 define internal void @storeFloatConst(i32 %a) {
 entry:
   %a.asptr = inttoptr i32 %a to float*
   store float 0x3FF3AE1480000000, float* %a.asptr, align 4
   ret void
 }
 ; CHECK-LABEL: storeFloatConst
 ; CHECK: movss
@@ skipping 19 matching lines @@
 ; CHECK: movsd
 
 ; MIPS32-LABEL: storeDoubleConst
 ; MIPS32: lui {{.*}},{{.*}}
 ; MIPS32: ldc1 $f{{.*}},{{.*}}
 ; MIPS32: sdc1 $f{{.*}},0{{.*}}
 ; MIPS32O2-LABEL: storeDoubleConst
 ; MIPS32O2: lui {{.*}},{{.*}}
 ; MIPS32O2: ldc1 $f{{.*}},{{.*}}
 ; MIPS32O2: sdc1 $f{{.*}},0{{.*}}